Structure of chip on chip mounting preventing from crosstalk noise

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United States of America Patent

PATENT NO 5767009
SERIAL NO

08798471

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention reduces crosstalk noise, which occurs as a result of interference between signals running in each of respective wiring layers of a first semiconductor chip and a second semiconductor chip stacked surface to surface with a small gap. The semiconductor device includes a first semiconductor chip (1) having a first electrode pad (2) and a first wiring layer (9), and a second semiconductor chip (5) having a second electrode pad (6) and a second wiring layer (10). A bump (4) is provided for electrically coupling the first electrode pad (2) and the second electrode pad (6). An insulation layer 8 is disposed between confronting surfaces of the first semiconductor chip (1) and the second semiconductor chip (5). An electro-conductive layer (7) is disposed between the confronting surfaces of the first semiconductor chip and the second semiconductor chip.

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Patent Owner(s)

Patent OwnerAddress
MATSUSHITA ELECTRIC INDUSTRIAL CO LTDJAPAN

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fujimoto, Hiroaki Osaka, JP 151 1919
Kasuga, Yoshiaki Shiga, JP 9 131
Matsuki, Toshio Kyoto, JP 10 224
Mimura, Tadaaki Osaka, JP 13 174
Otsuka, Takashi Osaka, JP 55 570
Yamane, Ichiro Osaka, JP 31 352
Yamashita, Takio Kyoto, JP 5 109
Yoshida, Takayuki Osaka, JP 131 1094

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