Reduced area of crossbar and method of operation
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United States of America Patent
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Jun 16, 1998
Issued Date -
N/A
app pub date -
Jun 7, 1995
filing date -
Nov 17, 1989
priority date (Note) -
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Abstract
There is disclosed a multi-processor system and method arranged, in one embodiment, as an image and graphics processor. The image processor is structured with several individual processors all having communication links to several memories. A crossbar switch serves to establish the processor memory links. The entire image processor, including the individual processors, the crossbar switch and the memories, is contained on a single silicon chip.
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