Process for improving roughness of conductive layer

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United States of America Patent

PATENT NO 5770500
SERIAL NO

08749569

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Abstract

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Disclosed is a method of fabricating hemispherical grained (HSG) silicon layers. A surface seeding method is disclosed, wherein an amorphous silicon layer is doped with germanium. The silicon may be doped with germanium during deposition, or a previously formed silicon layer may be implanted with the germanium. The layer may also be in situ conductively doped. The Ge-doped amorphous silicon is then subjected to a vacuum anneal in which surface migration of silicon atoms causes a redistribution in the layer, and hemispherical grains or bumps result. A seeding source gas may flow during the anneal to aid in nucleation. The method permits HSG silicon formation at lower temperature and shorter duration anneals than prior art methods. Greater silicon mobility in the presence of germanium dopants also enables the growth of larger grains, thus enhancing surface area. At the same time, the germanium provides conductivity for memory cell charge storage.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT633 WEST FIFTH STREET 24TH FLOOR LOS ANGELES CA 90071

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Batra, Shubneesh Boise, ID 91 1681
Fazan, Pierre C Boise, ID 145 4328
Zahurak, John K Boise, ID 155 2501

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