Importance

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Abstract

A flat-panel display device includes a display panel having a plurality of pixels arrayed in a matrix, the pixels in each row forming one horizontal pixel array, first to eighth driver sections arranged in series to divide pixels in each horizontal pixel array into eight pixel blocks, for driving the pixel blocks, respectively, first and second data supply buses each connected to at least one of the driver sections, and a liquid crystal controller for distributing pixel data sequentially supplied from outside to the first and second data supply buses. In particular, the liquid crystal controller includes a data distributing circuit having a plurality of memories each of which stores items of pixel data for one pixel block and is capable of reading from one area while writing to another area, a total memory capacity of the memories being smaller than a memory capacity required for storing all items of pixel data for one horizontal pixel array, and a sequence controller for performing a control of dividing pixel data items sequentially supplied from outside into pixel-data blocks each consisting of the same number of pixel data items, equivalent to the number of pixels forming one pixel block, sequentially writing two pixel-data blocks in two memories, reading two pixel-data blocks stored in the two memories in parallel while writing is performed, and supplying the two pixel-data blocks to corresponding ones of the first and second data supply buses.

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First Claim