Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5774397
SERIAL NO

08711652

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Abstract

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A non-volatile semiconductor memory device includes a semiconductor substrate, a memory cell including source and drain regions formed in a surface region of the semiconductor substrate, and a first gate insulating film, a charge storage layer, a second gate insulating film, and a control gate sequentially stacked on the semiconductor substrate, the memory cell being capable of electrically rewriting data by exchanging charges between the charge storage layer and the semiconductor substrate, and a means for applying a high potential to the semiconductor substrate and an intermediate potential to the control gate in a first data erase operation, and applying a high potential to the semiconductor substrate and a low potential to the control gate in second and subsequent data erase operations, thereby removing electrons from the charge storage layer.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
KABUSHIKI KAISHA TOSHIBATOKYO25313

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aritome, Seiichi Kawasaki, JP 291 6102
Endoh, Tetsuo Yokohama, JP 46 2094
Hemink, Gertjan Kawasaki, JP 23 2630
Shirota, Riichiro Kawasaki, JP 179 5393
Shuto, Susumu Ichikawa, JP 49 1284
Tanaka, Tomoharu Yokohama, JP 290 12379
Tanaka, Yoshiyuki Yokohama, JP 243 3666
Tanzawa, Toru Ebina, JP 216 3384

Cited Art Landscape

Patent Info (Count) # Cites Year
 
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* Cited By Examiner

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (10)
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7269069 Non-volatile memory and method with bit line to bit line coupled compensation 13 2006
* 2006/0227,614 Non-Volatile Memory and Method With Bit Line to Bit Line Coupled Compensation 0 2006
* 2006/0202,256 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 25 2006
7391650 Method for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates 21 2006
7342831 System for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates 97 2006
* 2007/0291,566 METHOD FOR OPERATING NON-VOLATILE MEMORY USING TEMPERATURE COMPENSATION OF VOLTAGES OF UNSELECTED WORD LINES AND SELECT GATES 8 2006
* 2007/0291,567 SYSTEM FOR OPERATING NON-VOLATILE MEMORY USING TEMPERATURE COMPENSATION OF VOLTAGES OF UNSELECTED WORD LINES AND SELECT GATES 3 2006
7492633 System for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines 4 2006
7349261 Method for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines 8 2006
* 2007/0291,543 METHOD FOR INCREASING PROGRAMMING SPEED FOR NON-VOLATILE MEMORY BY APPLYING COUNTER-TRANSITIONING WAVEFORMS TO WORD LINES 4 2006
* 2007/0291,545 SYSTEM FOR INCREASING PROGRAMMING SPEED FOR NON-VOLATILE MEMORY BY APPLYING COUNTER-TRANSITIONING WAVEFORMS TO WORD LINES 4 2006
7489549 System for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 25 2006
7486561 Method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 23 2006
* 2007/0297,245 SYSTEM FOR NON-REAL TIME REPROGRAMMING OF NON-VOLATILE MEMORY TO ACHIEVE TIGHTER DISTRIBUTION OF THRESHOLD VOLTAGES 11 2006
* 2007/0297,226 METHOD FOR NON-REAL TIME REPROGRAMMING OF NON-VOLATILE MEMORY TO ACHIEVE TIGHTER DISTRIBUTION OF THRESHOLD VOLTAGES 53 2006
* 2007/0297,247 METHOD FOR PROGRAMMING NON-VOLATILE MEMORY USING VARIABLE AMPLITUDE PROGRAMMING PULSES 14 2006
* 2006/0245,245 NON-VOLATILE MEMORY CELL USING HIGH-K MATERIAL AND INTER-GATE PROGRAMMING 15 2006
7949845 Indexing of file data in reprogrammable non-volatile memories that directly store data files 0 2006
7669003 Reprogrammable non-volatile memory systems with indexing of directly stored data files 24 2006
7558906 Methods of managing blocks in nonvolatile memory 3 2006
7552271 Nonvolatile memory with block management 78 2006
* 2007/0033,375 Indexing of File Data in Reprogrammable Non-Volatile Memories That Directly Store Data Files 38 2006
* 2007/0033,374 Reprogrammable Non-Volatile Memory Systems With Indexing of Directly Stored Data Files 52 2006
7610437 Data consolidation and garbage collection in direct data file storage memories 8 2006
7590794 Data operations in flash memories utilizing direct data file storage 2 2006
7590795 Flash memory systems utilizing direct data file storage 10 2006
7562181 Flash memory systems with direct data file storage utilizing data consolidation and garbage collection 6 2006
* 2007/0186,032 Flash Memory Systems With Direct Data File Storage Utilizing Data Consolidation and Garbage Collection 67 2006
* 2007/0033,376 Data Consolidation and Garbage Collection in Direct Data File Storage Memories 76 2006
7440326 Programming non-volatile memory with improved boosting 19 2006
7405968 Non-volatile memory cell using high-K material and inter-gate programming 43 2006
* 2007/0025,145 NON-VOLATILE MEMORY CELL USING HIGH-K MATERIAL AND INTER-GATE PROGRAMMING 5 2006
7734861 Pseudo random and command driven bit compensation for the cycling effects in flash memory 8 2006
7606966 Methods in a pseudo random and command driven bit compensation for the cycling effects in flash memory 5 2006
* 2008/0065,812 PSEUDO RANDOM AND COMMAND DRIVEN BIT COMPENSATION FOR THE CYCLING EFFECTS IN FLASH MEMORY 8 2006
* 2008/0065,813 METHODS IN A PSEUDO RANDOM AND COMMAND DRIVEN BIT COMPENSATION FOR THE CYCLING EFFECTS IN FLASH MEMORY 6 2006
7606077 Non-volatile memory with reduced erase/write cycling during trimming of initial programming voltage 7 2006
7606091 Method for non-volatile memory with reduced erase/write cycling during trimming of initial programming voltage 10 2006
7599223 Non-volatile memory with linear estimation of initial programming voltage 6 2006
7453731 Method for non-volatile memory with linear estimation of initial programming voltage 11 2006
* 2008/0062,785 Non-Volatile Memory With Reduced Erase/Write Cycling During Trimming of Initial Programming Voltage 6 2006
* 2008/0062,768 Method for Non-Volatile Memory With Reduced Erase/Write Cycling During Trimming of Initial Programming Voltage 11 2006
* 2008/0062,765 Method for Non-Volatile Memory With Linear Estimation of Initial Programming Voltage 10 2006
* 2008/0062,770 Non-Volatile Memory With Linear Estimation of Initial Programming Voltage 26 2006
7696044 Method of making an array of non-volatile memory cells with floating gates formed of spacers in substrate trenches 0 2006
7646054 Array of non-volatile memory cells with floating gates formed of spacers in substrate trenches 5 2006
* 2008/0070,363 Method of Making an Array of Non-Volatile Memory Cells With Floating Gates Formed of Spacers in Substrate Trenches 12 2006
* 2008/0067,572 Array of Non-Volatile Memory Cells With Floating Gates Formed of Spacers in Substrate Trenches 6 2006
7957185 Non-volatile memory and method with power-saving read and program-verify operations 4 2006
7570513 Non-volatile memory and method with power-saving read and program-verify operations 9 2006
* 2007/0014,161 Non-Volatile Memory and Method With Power-Saving Read and Program-Verify Operations 13 2006
* 2007/0014,156 Non-Volatile Memory and Method With Power-Saving Read and Program-Verify Operations 4 2006
8189378 Reducing program disturb in non-volatile storage 2 2006
8184478 Apparatus with reduced program disturb in non-volatile storage 0 2006
7886204 Methods of cell population distribution assisted read margining 3 2006
7716538 Memory with cell population distribution assisted read margining 83 2006
* 2008/0084,748 APPARATUS WITH REDUCED PROGRAM DISTURB IN NON-VOLATILE STORAGE 6 2006
* 2008/0084,747 REDUCING PROGRAM DISTURB IN NON-VOLATILE STORAGE 5 2006
* 2008/0077,841 Methods of Cell Population Distribution Assisted Read Margining 99 2006
* 2008/0077,842 Memory with Cell Population Distribution Assisted Read Margining 8 2006
7977186 Providing local boosting control implant for non-volatile memory 1 2006
7904783 Soft-input soft-output decoder for nonvolatile memory 66 2006
7818653 Methods of soft-input soft-output decoding for nonvolatile memory 10 2006
7805663 Methods of adapting operation of nonvolatile memory 91 2006
7705387 Non-volatile memory with local boosting control implant 3 2006
* 2008/0092,015 Nonvolatile memory with adaptive operation 26 2006
* 2008/0092,026 Methods of Soft-Input Soft-Output Decoding for Nonvolatile Memory 129 2006
* 2008/0081,419 PROVIDING LOCAL BOOSTING CONTROL IMPLANT FOR NON-VOLATILE MEMORY 4 2006
* 2008/0082,897 Soft-Input Soft-Output Decoder for Nonvolatile Memory 110 2006
* 2008/0079,052 NON-VOLATILE MEMORY WITH LOCAL BOOSTING CONTROL IMPLANT 3 2006
7684247 Reverse reading in non-volatile memory with compensation for coupling 4 2006
7675802 Dual voltage flash memory card 9 2006
7656735 Dual voltage flash memory methods 0 2006
7447076 Systems for reverse reading in non-volatile memory with compensation for coupling 7 2006
* 2008/0091,901 Method for non-volatile memory with worst-case control data management 14 2006
* 2008/0091,871 Non-volatile memory with worst-case control data management 5 2006
7372748 Voltage regulator in a non-volatile memory device 0 2006
* 2008/0089,141 VOLTAGE REGULATOR IN A NON-VOLATILE MEMORY DEVICE 1 2006
7691710 Fabricating non-volatile memory with dual voltage select gate structure 7 2006
7616490 Programming non-volatile memory with dual voltage select gate structure 10 2006
7586157 Non-volatile memory with dual voltage select gate structure 4 2006
* 2008/0089,128 PROGRAMMING NON-VOLATILE MEMORY WITH DUAL VOLTAGE SELECT GATE STRUCTURE 1 2006
* 2008/0090,351 FABRICATING NON-VOLATILE MEMORY WITH DUAL VOLTAGE SELECT GATE STRUCTURE 3 2006
* 2008/0089,127 NON-VOLATILE MEMORY WITH DUAL VOLTAGE SELECT GATE STRUCTURE 26 2006
7596031 Faster programming of highest multi-level state for non-volatile memory 15 2006
8001441 Nonvolatile memory with modulated error correction coding 13 2006
7904780 Methods of modulating error correction coding 51 2006
7904788 Methods of varying read threshold voltage in nonvolatile memory 13 2006
7558109 Nonvolatile memory with variable read threshold 187 2006
* 2008/0123,419 Methods of Varying Read Threshold Voltage in Nonvolatile Memory 25 2006
* 2008/0123,420 Nonvolatile Memory With Variable Read Threshold 122 2006
* 2008/0109,703 Nonvolatile Memory With Modulated Error Correction Coding 38 2006
7696035 Method for fabricating non-volatile memory with boost structures 3 2006
7508710 Operating non-volatile memory with boost structures 78 2006
7508703 Non-volatile memory with boost structures 3 2006
* 2008/0112,226 NON-VOLATILE MEMORY WITH BOOST STRUCTURES 49 2006
* 2008/0113,479 FABRICATING NON-VOLATILE MEMORY WITH BOOST STRUCTURES 7 2006
* 2008/0112,230 OPERATING NON-VOLATILE MEMORY WITH BOOST STRUCTURES 1 2006
7508721 Use of data latches in multi-phase programming of non-volatile memories 28 2006
* 2007/0097,744 Use of Data Latches in Multi-Phase Programming of Non-Volatile Memories 5 2006
7623386 Reducing program disturb in non-volatile storage using early source-side boosting 9 2006
7623387 Non-volatile storage with early source-side boosting for reducing program disturb 7 2006
7471566 Self-boosting system for flash memory cells 7 2006
* 2008/0137,426 NON-VOLATILE STORAGE WITH EARLY SOURCE-SIDE BOOSTING FOR REDUCING PROGRAM DISTURB 2 2006
* 2008/0137,425 REDUCING PROGRAM DISTURB IN NON-VOLATILE STORAGE USING EARLY SOURCE-SIDE BOOSTING 0 2006
7800161 Flash NAND memory cell array with charge storage elements positioned in trenches 10 2006
7642160 Method of forming a flash NAND memory cell array with charge storage elements positioned in trenches 3 2006
* 2008/0149,996 Flash NAND Memory Cell Array With Charge Storage Elements Positioned in Trenches 3 2006
* 2008/0153,226 Method of Forming a Flash NAND Memory Cell Array With Charge Storage Elements Positioned in Trenches 8 2006
8209461 Configuration of host LBA interface with flash memory 1 2006
8166267 Managing a LBA interface in a direct data file memory system 3 2006
8046522 Use of a direct data file system with a continuous logical address space interface and control of file address storage in logical blocks 0 2006
7917686 Host system with direct data file interface configurability 0 2006
7739444 System using a direct data file system with a continuous logical address space interface 2 2006
* 2008/0155,176 Host System With Direct Data File Interface Configurability 15 2006
* 2008/0155,227 Managing a LBA Interface in a Direct Data File Memory System 22 2006
* 2008/0155,178 Use of a Direct Data File System With a Continuous Logical Address Space Interface 22 2006
* 2008/0155,175 Host System That Manages a LBA Interface With Flash Memory 25 2006
7570520 Non-volatile storage system with initial programming voltage based on trial 89 2006
7551482 Method for programming with initial programming voltage based on trial 7 2006
* 2008/0158,980 NON-VOLATILE STORAGE SYSTEM WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL 11 2006
* 2008/0158,979 METHOD FOR PROGRAMMING WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL 12 2006
7890723 Method for code execution 0 2006
7890724 System for code execution 0 2006
7489547 Method of NAND flash memory cell array with adaptive memory state partitioning 9 2006
7489548 NAND flash memory cell array with adaptive memory state partitioning 3 2006
7468918 Systems for programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data 18 2006
7463531 Systems for programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages 21 2006
7450430 Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages 26 2006
7433241 Programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data 30 2006
* 2008/0159,002 PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY REMOVING PRE-CHARGE DEPENDENCY ON WORD LINE DATA 13 2006
* 2008/0159,004 PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY USING DIFFERENT PRE-CHARGE ENABLE VOLTAGES 10 2006
* 2008/0162,775 SYSTEM FOR CODE EXECUTION 1 2006
* 2008/0159,003 SYSTEMS FOR PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY REMOVING PRE-CHARGE DEPENDENCY ON WORD LINE DATA 4 2006
* 2008/0158,968 Method of NAND Flash Memory Cell Array With Adaptive Memory State Partitioning 19 2006
* 2008/0158,969 NAND Flash Memory Cell Array With Adaptive Memory State Partitioning 24 2006
* 2008/0158,991 SYSTEMS FOR PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY USING DIFFERENT PRE-CHARGE ENABLE VOLTAGES 0 2006
7583535 Biasing non-volatile storage to compensate for temperature variations 29 2006
7583539 Non-volatile storage with bias for temperature compensation 10 2006
7554853 Non-volatile storage with bias based on selective word line 6 2006
7525843 Non-volatile storage with adaptive body bias 8 2006
7468919 Biasing non-volatile storage based on selected word line 27 2006
7468920 Applying adaptive body bias to non-volatile storage 12 2006
* 2008/0158,976 BIASING NON-VOLATILE STORAGE BASED ON SELECTED WORD LINE 5 2006
* 2008/0158,970 BIASING NON-VOLATILE STORAGE TO COMPENSATE FOR TEMPERATURE VARIATIONS 11 2006
* 2008/0158,992 NON-VOLATILE STORAGE WITH ADAPTIVE BODY BIAS 4 2006
* 2008/0158,975 NON-VOLATILE STORAGE WITH BIAS FOR TEMPERATURE COMPENSATION 15 2006
* 2008/0158,960 APPLYING ADAPTIVE BODY BIAS TO NON-VOLATILE STORAGE 2 2006
* 2008/0159,007 NON-VOLATILE STORAGE WITH BIAS BASED ON SELECTED WORD LINE 33 2006
7577037 Use of data latches in cache operations of non-volatile memories 6 2007
7385854 Selective operation of a multi-state non-volatile memory system in a binary mode 3 2007
* 2007/0109,864 Selective Operation of a Multi-State Non-Volatile Memory System in a Binary Mode 3 2007
7551484 Non-volatile memory and method with reduced source line bias errors 0 2007
* 2007/0109,889 Non-Volatile Memory and Method With Reduced Source Line Bias Errors 1 2007
7660156 NAND flash memory with a programming voltage held dynamically in a NAND chain channel region 3 2007
* 2007/0109,859 Latched Programming of Memory and Method 2 2007
7428171 Non-volatile memory and method with improved sensing 0 2007
* 2007/0109,847 Non-Volatile Memory and Method With Improved Sensing 2 2007
7391645 Non-volatile memory and method with compensation for source line bias errors 5 2007
7391646 Non-volatile memory and method with control gate compensation for source line bias errors 5 2007
* 2007/0115,722 Non-Volatile Memory and Method With Control Gate Compensation for Source Line Bias Errors 0 2007
* 2007/0115,721 Non-Volatile Memory and Method With Compensation for Source Line Bias Errors 0 2007
* 2007/0143,545 Flash Controller Cache Architecture 5 2007
7573773 Flash memory with data refresh triggered by controlled scrub data reads 9 2007
7477547 Flash memory refresh techniques triggered by controlled scrub data reads 31 2007
* 2008/0239,808 Flash Memory Refresh Techniques Triggered by Controlled Scrub Data Reads 10 2007
* 2008/0239,851 Flash Memory with Data Refresh Triggered by Controlled Scrub Data Reads 5 2007
7904793 Method for decoding data in non-volatile storage using reliability metrics based on multiple reads 44 2007
7797480 Method for reading non-volatile storage using pre-conditioning waveforms and modified reliability metrics 5 2007
* 2008/0250,300 METHOD FOR DECODING DATA IN NON-VOLATILE STORAGE USING RELIABILITY METRICS BASED ON MULTIPLE READS 57 2007
* 2008/0244,162 METHOD FOR READING NON-VOLATILE STORAGE USING PRE-CONDITIONING WAVEFORMS AND MODIFIED RELIABILITY METRICS 12 2007
7606071 Compensating source voltage drop in non-volatile storage 7 2007
7606072 Non-volatile storage with compensation for source voltage drop 2 2007
* 2008/0266,963 COMPENSATING SOURCE VOLTAGE DROP IN NON-VOLATILE STORAGE 0 2007
* 2008/0266,964 NON-VOLATILE STORAGE WITH COMPENSATION FOR SOURCE VOLTAGE DROP 1 2007
7606079 Reducing power consumption during read operations in non-volatile storage 7 2007
* 2008/0266,975 NON-VOLATILE STORAGE WITH REDUCED POWER CONSUMPTION DURING READ OPERATIONS 4 2007
* 2008/0266,973 REDUCING POWER CONSUMPTION DURING READ OPERATIONS IN NON-VOLATILE STORAGE 29 2007
7440327 Non-volatile storage with reduced power consumption during read operations 7 2007
7463522 Non-volatile storage with boosting using channel isolation switching 1 2007
7460404 Boosting for non-volatile storage using channel isolation switching 6 2007
* 2008/0279,008 NON-VOLATILE STORAGE WITH BOOSTING USING CHANNEL ISOLATION SWITCHING 3 2007
* 2008/0279,007 BOOSTING FOR NON-VOLATILE STORAGE USING CHANNEL ISOLATION SWITCHING 1 2007
7518919 Flash memory data correction and scrub techniques 26 2007
7443736 Substrate electron injection techniques for programming non-volatile charge storage memory cells and for controlling program disturb 9 2007
* 2007/0217,264 Substrate Electron Injection Techniques for Programming Non-Volatile Charge Storage Memory Cells 4 2007
* 2008/0294,814 Flash Memory System with Management of Housekeeping Operations 41 2007
* 2008/0294,813 Managing Housekeeping Operations in Flash Memory 16 2007
7447081 Methods for improved program-verify operations in non-volatile memories 24 2007
* 2007/0230,250 Methods for Improved Program-Verify Operations in Non-Volatile Memories 1 2007
8713283 Method of interfacing a host operating through a logical address space with a direct file storage medium 2 2007
* 2008/0307,155 Method of Interfacing A Host Operating Through A Logical Address Space With A Direct File STorage Medium 10 2007
* 2008/0307,156 System For Interfacing A Host Operating Through A Logical Address Space With A Direct File Storage Medium 3 2007
7849383 Systems and methods for reading nonvolatile memory using multiple reading schemes 13 2007
* 2008/0320,346 SYSTEMS FOR READING NONVOLATILE MEMORY 12 2007
* 2008/0320,366 METHODS OF READING NONVOLATILE MEMORY 23 2007
7545678 Non-volatile storage with source bias all bit line sensing 10 2007
7539060 Non-volatile storage using current sensing with biasing of source and P-Well 1 2007
7532516 Non-volatile storage with current sensing of negative threshold voltages 3 2007
7489554 Method for current sensing with biasing of source and P-well in non-volatile storage 3 2007
* 2009/0003,068 METHOD FOR SOURCE BIAS ALL BIT LINE SENSING IN NON-VOLATILE STORAGE 2 2007
* 2009/0003,069 NON-VOLATILE STORAGE WITH SOURCE BIAS ALL BIT LINE SENSING 12 2007
7471567 Method for source bias all bit line sensing in non-volatile storage 17 2007
7447079 Method for sensing negative threshold voltages in non-volatile storage using current sensing 28 2007
* 2008/0247,239 METHOD FOR CURRENT SENSING WITH BIASING OF SOURCE AND P-WELL IN NON-VOLATILE STORAGE 0 2007
* 2008/0247,253 NON-VOLATILE STORAGE WITH TEMPERATURE COMPENSATION FOR BIT LINE DURING SENSE OPERATIONS 25 2007
* 2008/0247,238 METHOD FOR SENSING NEGATIVE THRESHOLD VOLTAGES IN NON-VOLATILE STORAGE USING CURRENT SENSING 1 2007
* 2008/0247,228 NON-VOLATILE STORAGE WITH CURRENT SENSING OF NEGATIVE THRESHOLD VOLTAGES 10 2007
* 2008/0247,229 NON-VOLATILE STORAGE USING CURRENT SENSING WITH BIASING OF SOURCE AND P-Well 0 2007
* 2008/0247,254 METHOD FOR TEMPERATURE COMPENSATING BIT LINE DURING SENSE OPERATIONS IN NON-VOLATILE STORAGE 14 2007
* 2007/0279,992 Non-Volatile Memory And Method With Reduced Neighboring Field Errors 5 2007
7522457 Systems for erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage 20 2007
7457166 Erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage 29 2007
* 2008/0019,164 Systems for Erase Voltage Manipulation in Non-Volatile Memory for Controlled Shifts in Threshold Voltage 8 2007
* 2008/0013,360 Erase Voltage Manipulation in Non-Volatile Memory for Controlled Shifts in Threshold Voltage 3 2007
7471575 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 5 2007
* 2007/0263,450 Non-Volatile Memory and Method with Shared Processing for an Aggregate of Read/Write Circuits 5 2007
7532514 Non-volatile memory and method with bit line to bit line coupled compensation 31 2007
* 2007/0297,234 Non-Volatile Memory And Method With Bit Line To Bit Line Coupled Compensation 85 2007
7885112 Nonvolatile memory and method for on-chip pseudo-randomization of data within a page and between pages 6 2007
* 2009/0067,244 NONVOLATILE MEMORY AND METHOD FOR ON-CHIP PSEUDO-RANDOMIZATION OF DATA WITHIN A PAGE AND BETWEEN PAGES 27 2007
7894269 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells 7 2007
7652929 Non-volatile memory and method for biasing adjacent word line for verify during programming 19 2007
* 2009/0073,771 Non-Volatile Memory and Method for Biasing Adjacent Word Line for Verify During Programming 16 2007
* 2008/0019,188 Nonvolatile Memory and Method for Compensating During Programming for Perturbing Charges of Neighboring Cells 29 2007
8026170 Method of forming a single-layer metal conductors with multiple thicknesses 3 2007
7577034 Reducing programming voltage differential nonlinearity in non-volatile storage 8 2007
* 2009/0080,263 REDUCING PROGRAMMING VOLTAGE DIFFERENTIAL NONLINEARITY IN NON-VOLATILE STORAGE 11 2007
* 2009/0080,229 SINGLE-LAYER METAL CONDUCTORS WITH MULTIPLE THICKNESSES 13 2007
7492634 Method for programming of multi-state non-volatile memory using smart verify 13 2007
* 2009/0088,876 PORTABLE, DIGITAL MEDIA PLAYER AND ASSOCIATED METHODS 9 2007
7453735 Non-volatile memory and control with improved partial page program capability 6 2007
* 2008/0025,099 Non-Volatile Memory And Control With Improved Partial Page Program Capability 4 2007
7573747 Alternate row-based reading and writing for non-volatile memory 1 2007
* 2008/0049,506 Alternate Row-Based Reading and Writing for Non-Volatile Memory 75 2007
8296498 Method and system for virtual fast access non-volatile RAM 5 2007
7411827 Boosting to control programming of non-volatile memory 12 2007
* 2008/0068,891 BOOSTING TO CONTROL PROGRAMMING OF NON-VOLATILE MEMORY 0 2007
7565478 Scheduling of housekeeping operations in flash memory systems 6 2007
* 2008/0091,872 Scheduling of Housekeeping Operations in Flash Memory Systems 42 2007
7688638 Faster programming of multi-level non-volatile storage through reduced verify operations 9 2007
* 2009/0147,573 FASTER PROGRAMMING OF MULTI-LEVEL NON-VOLATILE STORAGE THROUGH REDUCED VERIFY OPERATIONS 22 2007
7609556 Non-volatile memory with improved program-verify operations 4 2007
* 2008/0094,911 Non-Volatile Memory With Improved Program-Verify Operations 3 2007
7463528 Temperature compensation of select gates in non-volatile memory 27 2007
7460407 Temperature compensation of voltages of unselected word lines in non-volatile memory based on word line position 11 2007
* 2008/0094,908 TEMPERATURE COMPENSATION OF VOLTAGES OF UNSELECTED WORD LINES IN NON-VOLATILE MEMORY BASED ON WORD LINE POSITION 7 2007
* 2008/0094,930 TEMPERATURE COMPENSATION OF SELECT GATES IN NON-VOLATILE MEMORY 5 2007
7764547 Regulation of source potential to combat cell source IR drop 9 2007
7701761 Read, verify word line reference voltage to track source level 8 2007
* 2009/0161,433 Regulation of Source Potential to Combat Cell Source IR Drop 14 2007
* 2009/0161,434 Read, Verify Word Line Reference Voltage to Track Source Level 1 2007
8880483 System and method for implementing extensions to intelligently manage resources of a mass storage system 0 2007
* 2009/0164,705 System and Method for Implementing Extensions to Intelligently Manage Resources of a Mass Storage System 13 2007
7468921 Method for increasing programming speed for non-volatile memory by applying direct-transitioning waveforms to word lines 0 2008
* 2008/0130,370 METHOD FOR INCREASING PROGRAMMING SPEED FOR NON-VOLATILE MEMORY BY APPLYING DIRECT-TRANSITIONING WAVEFORMS TO WORD LINES 2 2008
7567466 Non-volatile memory with redundancy data buffered in remote buffer circuits 3 2008
* 2008/0137,419 Non-Volatile Memory With Redundancy Data Buffered in Remote Buffer Circuits 5 2008
7593277 Method for compensated sensing in non-volatile memory 1 2008
* 2008/0117,701 Method For Compensated Sensing In Non-Volatile Memory 4 2008
7834386 Non-volatile memory with epitaxial regions for limiting cross coupling between floating gates 0 2008
7807533 Method for forming non-volatile memory with shield plate for limiting cross coupling between floating gates 5 2008
* 2008/0124,865 METHOD FOR FORMING NON-VOLATILE MEMORY WITH SHIELD PLATE FOR LIMITING CROSS COUPLING BETWEEN FLOATING GATES 0 2008
* 2008/0116,502 NON-VOLATILE MEMORY WITH EPITAXIAL REGIONS FOR LIMITING CROSS COUPLING BETWEEN FLOATING GATES 4 2008
8239639 Method and apparatus for providing data type and host file information to a mass storage system 5 2008
* 2008/0307,158 METHOD AND APPARATUS FOR PROVIDING DATA TYPE AND HOST FILE INFORMATION TO A MASS STORAGE SYSTEM 33 2008
9396103 Method and system for storage address re-mapping for a memory device 0 2008
8429352 Method and system for memory block flushing 10 2008
* 2008/0307,192 Method And System For Storage Address Re-Mapping For A Memory Device 86 2008
* 2008/0307,164 Method And System For Memory Block Flushing 25 2008
7577026 Source and drain side early boosting using local self boosting for non-volatile storage 2 2008
* 2008/0278,999 SOURCE AND DRAIN SIDE EARLY BOOSTING USING LOCAL SELF BOOSTING FOR NON-VOLATILE STORAGE 0 2008
7606076 Sensing in non-volatile storage using pulldown to regulated source voltage to remove system noise 12 2008
* 2008/0247,241 SENSING IN NON-VOLATILE STORAGE USING PULLDOWN TO REGULATED SOURCE VOLTAGE TO REMOVE SYSTEM NOISE 9 2008
7915664 Non-volatile memory with sidewall channels and raised source/drain regions 0 2008
* 2009/0261,398 NON-VOLATILE MEMORY WITH SIDEWALL CHANNELS AND RAISED SOURCE/DRAIN REGIONS 7 2008
* 2009/0271,562 Method and system for storage address re-mapping for a multi-bank memory device 135 2008
8051240 Compensating non-volatile storage using different pass voltages during program-verify and read 8 2008
* 2009/0282,184 COMPENSATING NON-VOLATILE STORAGE USING DIFFERENT PASS VOLTAGES DURING PROGRAM-VERIFY AND READ 7 2008
7719902 Enhanced bit-line pre-charge scheme for increasing channel boosting in non-volatile storage 6 2008
* 2009/0290,429 ENHANCED BIT-LINE PRE-CHARGE SCHEME FOR INCREASING CHANNEL BOOSTING IN NON-VOLATILE STORAGE 9 2008
7826271 Nonvolatile memory with index programming and reduced verify 13 2008
* 7813172 Nonvolatile memory with correlated multiple pass programming 3 2008
7800945 Method for index programming and reduced verify in nonvolatile memory 12 2008
7796435 Method for correlated multiple pass programming in nonvolatile memory 4 2008
* 2009/0310,421 Nonvolatile Memory with Correlated Multiple Pass Programming 8 2008
* 2009/0310,418 Method for Index Programming and Reduced Verify in Nonvolatile Memory 9 2008
* 2009/0310,419 Nonvolatile Memory with Index Programming and Reduced Verify 9 2008
* 2009/0310,420 Method for Correlated Multiple Pass Programming in Nonvolatile Memory 6 2008
9678877 Flash controller cache architecture 0 2008
* 2008/0250,202 FLASH CONTROLLER CACHE ARCHITECTURE 5 2008
7499324 Non-volatile memory and method with control gate compensation for source line bias errors 11 2008
* 2008/0253,185 Non-Volatile Memory and Method with Control Gate Compensation for Source Line Bias Errors 0 2008
7800956 Programming algorithm to reduce disturb with minimal extra time penalty 13 2008
7751249 Minimizing power noise during sensing in memory device 5 2008
7751250 Memory device with power noise minimization during sensing 4 2008
7663950 Method for column redundancy using data latches in solid-state memories 2 2008
* 2009/0323,429 PROGRAMMING ALGORITHM TO REDUCE DISTURB WITH MINIMAL EXTRA TIME PENALTY 10 2008
* 2009/0323,420 MINIMIZING POWER NOISE DURING SENSING IN MEMORY DEVICE 1 2008
* 2009/0323,421 MEMORY DEVICE WITH POWER NOISE MINIMIZATION DURING SENSING 3 2008
* 2008/0266,957 Method for Column Redundancy Using Data Latches in Solid-State Memories 19 2008
8151035 Non-volatile memory and method with multi-stream updating 6 2008
* 2008/0301,359 Non-Volatile Memory and Method With Multi-Stream Updating 10 2008
8103841 Non-volatile memory and method with non-sequential update block management 4 2008
7913061 Non-volatile memory and method with memory planes alignment 12 2008
* 2009/0019,217 Non-Volatile Memory And Method With Memory Planes Alignment 6 2008
* 2009/0019,218 Non-Volatile Memory And Method With Non-Sequential Update Block Management 96 2008
7945759 Non-volatile memory and method with phased program failure handling 5 2008
* 2009/0037,651 Non-Volatile Memory and Method with Phased Program Failure Handling 31 2008
7853772 Method for managing partitions in a storage device 22 2008
* 2009/0043,984 METHOD FOR MANAGING PARTITIONS IN A STORAGE DEVICE 15 2008
7733703 Method for non-volatile memory with background data latch caching during read operations 5 2008
* 2009/0067,253 Method for Non-Volatile Memory With Background Data Latch Caching During Read Operations 7 2008
7773414 Self-boosting system for flash memory cells 4 2008
* 2009/0073,761 Self-Boosting System for Flash Memory Cells 6 2008
7751244 Applying adaptive body bias to non-volatile storage based on number of programming cycles 4 2008
7817476 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 2 2008
* 2009/0103,369 Non-Volatile Memory and Method with Shared Processing for an Aggregate of Read/Write Circuits 1 2008
7633802 Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 83 2008
* 2009/0103,356 NON-REAL TIME REPROGRAMMING OF NON-VOLATILE MEMORY TO ACHIEVE TIGHTER DISTRIBUTION OF THRESHOLD VOLTAGES 5 2008
8700840 Nonvolatile memory with write cache having flush/eviction methods 6 2009
8244960 Non-volatile memory and method with write cache partition management methods 33 2009
8094500 Non-volatile memory and method with write cache partitioning 21 2009
8040744 Spare block management of non-volatile memories 100 2009
* 2010/0174,846 Nonvolatile Memory With Write Cache Having Flush/Eviction Methods 55 2009
* 2010/0172,179 Spare Block Management of Non-Volatile Memories 129 2009
* 2010/0172,180 Non-Volatile Memory and Method With Write Cache Partitioning 81 2009
* 2010/0174,845 Wear Leveling for Non-Volatile Memories: Maintenance of Experience Count and Passive Techniques 117 2009
8621323 Pipelined data relocation and improved chip architectures 1 2009
* 2009/0125,785 Pipelined Data Relocation and Improved Chip Architectures 19 2009
7864570 Self-boosting system with suppression of high lateral electric fields 2 2009
* 2009/0147,571 SELF-BOOSTING SYSTEM WITH SUPPRESSION OF HIGH LATERAL ELECTRIC FIELDS 1 2009
* 2009/0210,614 Non-Volatile Memories With Versions of File Data Identified By Identical File ID and File Offset Stored in Identical Location Within a Memory Page 11 2009
* 2009/0182,791 Non-Volatile Memories And Method With Adaptive File Handling In A Directly Mapped File Storage System 10 2009
8004895 Flash memory data correction and scrub techniques 7 2009
* 2009/0187,785 Flash Memory Data Correction And Scrub Techniques 33 2009
7790562 Method for angular doping of source and drain regions for odd and even NAND blocks 2 2009
* 2009/0233,412 METHOD FOR ANGULAR DOPING OF SOURCE AND DRAIN REGIONS FOR ODD AND EVEN NAND BLOCKS 2 2009
7983065 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines 86 2009
8117380 Management of non-volatile memory systems having large erase blocks 2 2009
* 2009/0216,938 Management Of Non-Volatile Memory Systems Having Large Erase Blocks 8 2009
8027195 Folding data stored in binary format into multi-state format within non-volatile memory devices 37 2009
* 2010/0309,719 Folding Data Stored in Binary Format Into Multi-State Format Within Non-Volatile Memory Devices 23 2009
7962777 Flash memory system startup operation 12 2009
* 2009/0254,776 Flash Memory System Startup Operation 5 2009
7974124 Pointer based column selection techniques in non-volatile memories 5 2009
* 2010/0329,007 Pointer Based Column Selection Techniques in Non-Volatile Memories 22 2009
7768834 Non-volatile storage system with initial programming voltage based on trial 2 2009
* 2009/0257,282 NON-VOLATILE STORAGE SYSTEM WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL 4 2009
8364883 Scheduling of housekeeping operations in flash memory systems 1 2009
* 2009/0265,508 Scheduling of Housekeeping Operations in Flash Memory Systems 14 2009
7936602 Use of data latches in cache operations of non-volatile memories 3 2009
* 2009/0262,578 Use of Data Latches in Cache Operations of Non-Volatile Memories 7 2009
* 2011/0002,169 Bad Column Management with Bit Information in Non-Volatile Memory Systems 23 2009
7907458 Non-volatile memory with redundancy data buffered in remote buffer circuits 0 2009
* 2009/0273,986 Non-Volatile Memory With Redundancy Data Buffered in Remote Buffer Circuits 1 2009
7852678 Non-volatile memory with improved sensing by reducing source line current 4 2009
7889560 Alternate row-based reading and writing for non-volatile memory 5 2009
* 2009/0296,469 Alternate Row-Based Reading And Writing For Non-Volatile Memory 2 2009
7839685 Soft errors handling in EEPROM devices 13 2009
* 2010/0020,616 Soft Errors Handling in EEPROM Devices 4 2009
8018769 Non-volatile memory with linear estimation of initial programming voltage 7 2009
7994004 Flash memory cell arrays having dual control gates per memory cell charge storage element 2 2009
* 2010/0047,982 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 2 2009
8301826 Adaptive mode switching of flash memory address mapping based on host usage characteristics 5 2009
* 2010/0049,908 Adaptive Mode Switching of Flash Memory Address Mapping Based on Host Usage Characteristics 7 2009
8284606 Compensating for coupling during programming 7 2009
* 2010/0067,296 COMPENSATING FOR COUPLING DURING PROGRAMMING 23 2009
8473669 Method and system for concurrent background and foreground operations in a non-volatile memory array 11 2009
* 2011/0138,100 METHOD AND SYSTEM FOR CONCURRENT BACKGROUND AND FOREGROUND OPERATIONS IN A NON-VOLATILE MEMORY ARRAY 40 2009
8102705 Structure and method for shuffling data within non-volatile memory devices 35 2009
* 2010/0309,720 Structure and Method for Shuffling Data Within Non-Volatile Memory Devices 14 2009
8194470 Methods of forming flash device with shared word lines 7 2009
* 2010/0091,569 METHODS OF FORMING FLASH DEVICE WITH SHARED WORD LINES 2 2009
8468294 Non-volatile memory with multi-gear control using on-chip folding of data 5 2009
8144512 Data transfer flows for on-chip folding 33 2009
* 2011/0153,913 Non-Volatile Memory with Multi-Gear Control Using On-Chip Folding of Data 17 2009
7965562 Predictive programming in non-volatile memory 3 2009
* 2010/0097,857 Predictive Programming in Non-Volatile Memory 1 2009
7978533 NAND flash memory with a programming voltage held dynamically in a NAND chain channel region 1 2009
* 2010/0146,197 Non-Volatile Memory And Method With Memory Allocation For A Directly Mapped File Storage System 11 2010
8098526 Reverse reading in non-volatile memory with compensation for coupling 0 2010
* 2010/0149,876 Reverse Reading In Non-Volatile Memory With Compensation For Coupling 3 2010
8209516 Method and system for dual mode access for storage devices 1 2010
8179723 Non-volatile memory with boost structures 3 2010
* 2010/0157,678 NON-VOLATILE MEMORY WITH BOOST STRUCTURES 5 2010
8054681 Read, verify word line reference voltage to track source level 0 2010
* 2010/0157,681 Read, Verify Word Line Reference Voltage to Track Source Level 0 2010
8351236 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture 16 2010
8199576 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a double-global-bit-line architecture 28 2010
* 2010/0259,962 Three-Dimensional Array of Re-Programmable Non-Volatile Memory Elements Having Vertical Bit Lines and a Single-Sided Word Line Architecture 97 2010
* 2010/0259,961 Three-Dimensional Array of Re-Programmable Non-Volatile Memory Elements Having Vertical Bit Lines and a Double-Global-Bit-Line Architecture 86 2010
8023322 Non-volatile memory and method with reduced neighboring field errors 1 2010
* 2010/0182,831 Non-Volatile Memory And Method With Reduced Neighboring Field Errors 2 2010
8000146 Applying different body bias to different substrate portions for non-volatile storage 2 2010
* 2010/0195,398 APPLYING DIFFERENT BODY BIAS TO DIFFERENT SUBSTRATE PORTIONS FOR NON-VOLATILE STORAGE 6 2010
7965560 Non-volatile memory with power-saving multi-pass sensing 1 2010
* 2010/0202,212 Non-Volatile Memory With Power-Saving Multi-Pass Sensing 1 2010
7984233 Direct data file storage implementation techniques in flash memories 1 2010
* 2010/0217,926 Direct Data File Storage Implementation Techniques in Flash Memories 8 2010
8214583 Direct file data programming and deletion in flash memories 23 2010
* 2010/0223,423 Direct File Data Programming and Deletion in Flash Memories 25 2010
8036041 Method for non-volatile memory with background data latch caching during read operations 13 2010
* 2010/0226,176 Method for Non-Volatile Memory With Background Data Latch Caching During Read Operations 2 2010
7902031 Method for angular doping of source and drain regions for odd and even NAND blocks 0 2010
* 2010/0297,823 METHOD FOR ANGULAR DOPING OF SOURCE AND DRAIN REGIONS FOR ODD AND EVEN NAND BLOCKS 3 2010
8452911 Synchronized maintenance operations in a multi-bank storage system 2 2010
8045378 Nonvolatile memory with correlated multiple pass programming 1 2010
* 2011/0019,471 Nonvolatile Memory with Correlated Multiple Pass Programming 2 2010
8873303 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 0 2010
* 2011/0019,485 Non-Volatile Memory and Method with Shared Processing for an Aggregate of Read/Write Circuits 0 2010
8914703 Method for copying data in reprogrammable non-volatile memory 0 2010
* 2011/0072,332 Method for Copying Data in Reprogrammable Non-Volatile Memory 22 2010
8050095 Flash memory data correction and scrub techniques 7 2010
* 2011/0055,468 Flash Memory Data Correction and Scrub Techniques 39 2010
8050126 Non-volatile memory with improved sensing by reducing source line current 0 2010
* 2011/0075,480 Non-Volatile Memory With Improved Sensing By Reducing Source Line Current 2 2010
8472280 Alternate page by page programming scheme 17 2010
8473813 Methods of cell population distribution assisted read margining 1 2011
* 2011/0099,438 Methods of Cell Population Distribution Assisted Read Margining 7 2011
8468424 Method for decoding data in non-volatile storage using reliability metrics based on multiple reads 1 2011
8163622 Method for angular doping of source and drain regions for odd and even NAND blocks 1 2011
* 2011/0151,636 Method For Angular Doping Of Source And Drain Regions For Odd And Even NAND Blocks 3 2011
* 2011/0131,473 Method For Decoding Data In Non-Volatile Storage Using Reliability Metrics Based On Multiple Reads 21 2011
8400839 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells 8 2011
* 2011/0141,818 Nonvolatile Memory and Method for Compensating During Programming for Perturbing Charges of Neighboring Cells 2 2011
8363495 Non-volatile memory with redundancy data buffered in remote buffer circuits 0 2011
9342446 Non-volatile memory system allowing reverse eviction of data updates to non-volatile binary cache 0 2011
8621177 Non-volatile memory and method with phased program failure handling 0 2011
* 2011/0219,174 Non-Volatile Memory and Method with Phased Program Failure Handling 3 2011
8843693 Non-volatile memory and method with improved data scrambling 0 2011
8154923 Non-volatile memory and method with power-saving read and program-verify operations 4 2011
* 2011/0222,345 Non-Volatile Memory and Method With Power-Saving Read and Program-Verify Operations 1 2011
8547720 Non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines 13 2011
8526237 Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereof 6 2011
8159876 Non-volatile memory and method for power-saving multi-pass sensing 1 2011
* 2011/0235,435 Non-Volatile Memory and Method for Power-Saving Multi-Pass Sensing 0 2011
8164957 Reducing energy consumption when applying body bias to substrate having sets of nand strings 4 2011
8334180 Flash memory cell arrays having dual control gates per memory cell charge storage element 0 2011
8300457 Non-volatile memory and method with reduced neighboring field errors 0 2011
8239643 Non-volatile memory and method with control data management 1 2011
8351269 Method for non-volatile memory with background data latch caching during read operations 2 2011
8300458 Nonvolatile memory with correlated multiple pass programming 2 2011
8300473 Non-volatile memory with improved sensing by reducing source line current 0 2011
8711625 Bad column management with bit information in non-volatile memory systems 5 2011
8824183 Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereof 3 2011
8625322 Non-volatile memory having 3D array of read/write elements with low current structures and methods thereof 15 2011
8762627 Memory logical defragmentation during garbage collection 0 2011
8228729 Structure and method for shuffling data within non-volatile memory devices 2 2011
8842473 Techniques for accessing column selecting shift register with skipped entries in non-volatile memories 2 2012
8542529 Non-volatile memory and method with power-saving read and program-verify operations 0 2012
9135192 Memory system with command queue reordering 0 2012
8687421 Scrub techniques for use with dynamic read 6 2012
8300459 Non-volatile memory and method for power-saving multi-pass sensing 1 2012
8681548 Column redundancy circuitry for non-volatile memory 1 2012
8725935 Balanced performance for on-chip folding of non-volatile memories 0 2012
8750045 Experience count dependent program algorithm for flash memory 0 2012
9224475 Structures and methods for making NAND flash memory 1 2012
8411507 Compensating for coupling during programming 1 2012
8472255 Compensation of non-volatile memory chip non-idealities by program pulse adjustment 2 2012
9153595 Methods of making word lines and select lines in NAND flash memory 0 2012
9076506 Variable rate parallel to serial shift register 2 2012
8897080 Variable rate serial to parallel shift register 0 2012
9129854 Full metal gate replacement process for NAND flash memory 0 2012
* 9218881 Flash memory blocks with extended data retention 0 2012
* 2014/0115,230 Flash Memory with Data Retention Partition 0 2012
8902669 Flash memory with data retention bias 1 2012
8823075 Select gate formation for nanodot flat cell 6 2012
8780605 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture 2 2013
9076545 Dynamic adjustment of read voltage levels based on memory cell threshold voltage distribution 2 2013
9099532 Processes for NAND flash memory fabrication 1 2013
8987802 Method for using nanoparticles to make uniform discrete floating gate layer 1 2013
9227456 Memories with cylindrical read/write stacks 3 2013
9331181 Nanodot enhanced hybrid floating gate for non-volatile memory devices 1 2013
9281029 Non-volatile memory having 3D array architecture with bit line voltage control and methods thereof 0 2013
9734050 Method and system for managing background operations in a multi-layer memory 0 2013
9734911 Method and system for asynchronous die operations in a non-volatile memory 0 2013
9666285 Method and system for asynchronous die operations in a non-volatile memory 0 2013
9465731 Multi-layer non-volatile memory system having multiple partitions in a layer 1 2013
9336133 Method and system for managing program cycles including maintenance programming operations in a multi-layer memory 0 2013
9223693 Memory system having an unequal number of memory die on different control channels 0 2013
8873284 Method and system for program scheduling in a multi-layer memory 1 2013
9147439 Non-volatile memory having 3D array architecture with staircase word lines and vertical bit lines and methods thereof 0 2013
8923050 3D memory with vertical bit lines and staircase word lines and vertical switches and methods thereof 1 2013
8895437 Method for forming staircase word lines in a 3D non-volatile memory having vertical bit lines 3 2013
8942038 High endurance nonvolatile memory 0 2013
8932948 Memory cell floating gate replacement 0 2013
8966350 Providing reliability metrics for decoding data in non-volatile storage 0 2013
9123430 Differential current sense amplifier and method for non-volatile memory 0 2013
8933516 High capacity select switches for three-dimensional structures 9 2013
8745322 Management of non-volatile memory systems having large erase blocks 1 2013
8969153 NAND string containing self-aligned control gate sidewall cladding 5 2013
9218242 Write operations for defect management in nonvolatile memory 0 2013
9063671 Write operations with full sequence programming for defect management in nonvolatile memory 0 2013
9177663 Dynamic regulation of memory array source line 1 2013
8824191 Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereof 8 2013
9613806 Triple patterning NAND flash memory 0 2013
8932955 Triple patterning NAND flash memory with SOC 4 2013
9245629 Method for non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines 3 2013
9043537 Update block programming order 1 2013
9218283 Multi-die write management 0 2013
9244631 Lower page only host burst writes 0 2013
9490035 Centralized variable rate serializer and deserializer for bad column management 0 2013
9122591 Pipelined data relocation and improved chip architectures 1 2013
8817514 Non-volatile memory having 3D array of read/write elements with low current structures and methods thereof 2 2014
9190134 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture 4 2014
9508437 Pattern breaking in multi-die write management 0 2014
9368224 Self-adjusting regulation current for memory array source line 0 2014
9064547 3D non-volatile memory having low-current cells and methods 0 2014
9230689 Finding read disturbs on non-volatile memories 0 2014
9123392 Non-volatile 3D memory with cell-selectable word line decoding 2 2014
RE46498 Reducing energy consumption when applying body bias to substrate having sets of NAND strings 0 2014
8902652 Systems and methods for lower page writes 5 2014
8886877 In-situ block folding for nonvolatile memory 6 2014
8972675 Efficient post write read in three dimensional nonvolatile memory 3 2014
9009398 Write operations for defect management in nonvolatile memory 1 2014
9177808 Memory device with control gate oxygen diffusion control and method of making thereof 0 2014
8964467 Systems and methods for partial page programming of multi level cells 2 2014
9182928 Lower page only host burst writes 1 2014
9104556 Update block programming order 0 2014
9153324 Pattern breaking in multi-die write management 0 2014
9245898 NAND flash memory integrated circuits and processes with controlled gate height 0 2014
8958228 Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereof 4 2014
9337085 Air gap formation between bit lines with side protection 0 2014
9330969 Air gap formation between bit lines with top protection 0 2014
9466523 Contact hole collimation using etch-resistant walls 0 2014
9224637 Bi-level dry etching scheme for transistor contacts 0 2014
9401275 Word line with multi-layer cap structure 0 2014
9224744 Wide and narrow patterning using common process 3 2014
9201788 In-situ block folding for nonvolatile memory 0 2014
9552171 Read scrub with adaptive counter management 0 2014
9355713 Systems and methods for lower page writes 1 2014
9349479 Boundary word line operation in nonvolatile memory 1 2014
9224502 Techniques for detection and treating memory hole to local interconnect marginality defects 0 2015
9230971 NAND string containing self-aligned control gate sidewall cladding 0 2015
9390922 Process for forming wide and narrow conductive lines 0 2015
9449700 Boundary word line search and open block read methods with reduced read disturb 0 2015
9425047 Self-aligned process using variable-fluidity material 0 2015
* 9564213 Program verify for non-volatile storage 0 2015
9564219 Current based detection and recording of memory hole-interconnect spacing defects 0 2015
9269446 Methods to improve programming of slow cells 1 2015
9502428 Sidewall assisted process for wide and narrow line formation 0 2015
9595444 Floating gate separation in NAND flash memory 0 2015
9570184 Dynamic adjustment of read voltage levels based on memory cell threshold voltage distribution 0 2015
9570185 Dynamic adjustment of read voltage levels based on memory cell threshold voltage distribution 0 2015
9627393 Height reduction in memory periphery 0 2015
9613971 Select gates with central open areas 0 2015
9443862 Select gates with select gate dielectric first 0 2015
9484314 Word line hook up with protected air gap 1 2015
9653154 Write abort detection for multi-state memories 0 2015
9466790 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines 1 2015
9721653 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture 0 2016
 
MONTEREY RESEARCH, LLC (7)
* 5986932 Non-volatile static random access memory and methods for using same 86 1997
* 5914895 Non-volatile random access memory and methods for making and configuring same 29 1997
7760540 Combination SRAM and NVSRAM semiconductor memory array 12 2006
7710776 window in non-volatile static random access memory 15 2006
* 2008/0158,981 Method and apparatus for on chip sensing of SONOS VT window in non-volatile static random access memory 2 2006
7859925 Anti-fuse latch self-test circuit and method 3 2007
7859906 Circuit and method to increase read margin in non-volatile memories using a differential sensing circuit 6 2008
 
INTEL CORPORATION (1)
* 6549457 Using multiple status bits per cell for handling power failures during write operations 33 2002
 
Semiconductor Energy Laboratory Co., Ltd. (2)
9123432 Semiconductor device and method for driving semiconductor device 0 2013
9633710 Method for operating semiconductor device 0 2016
 
RENESAS ELECTRONICS CORPORATION (2)
* 6064597 Method of programming a multilevel nonvolatile memory cell with reduced number of erase operations 9 1997
* 6137732 Semiconductor memory device having voltage boosting circuit 11 1999
 
SANDISK CORPORATION (2)
* 2004/0066,680 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 2 2003
7161836 Method for programming non-volatile memory with self-adjusting maximum program loop 1 2005
 
SanDisk Technologies (1)
9348746 Method and system for managing block reclaim operations in a multi-layer memory 1 2013
 
KABUSHIKI KAISHA TOSHIBA (54)
6414893 Nonvolatile semiconductor memory device and method of using the same 24 1998
6331960 Nonvolatile semiconductor memory device and method for using the same 6 2000
* 6522580 Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states 740 2001
6643188 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 287 2002
6807095 Multi-state nonvolatile memory capable of reducing effects of coupling between storage elements 205 2002
6944063 Non-volatile semiconductor memory with large erase blocks storing cycle counts 49 2003
* 6856544 Semiconductor memory device in which source line potential is controlled in accordance with data programming mode 4 2003
* 2003/0128,587 Semiconductor memory device in which source line potential is controlled in accordance with data programming mode 0 2003
6894931 Nonvolatile semiconductor memory device 70 2003
6990019 Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell 13 2003
* 7301806 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell 9 2004
* 2005/0024,944 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell 1 2004
7057936 Nonvolatile semiconductor memory device 95 2004
7061798 Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states 38 2004
* 7245528 Semiconductor memory device which stores plural data in a cell 49 2004
* 2005/0169,057 Semiconductor memory device which stores plural data in a cell 84 2004
7085161 Non-volatile semiconductor memory with large erase blocks storing cycle counts 10 2004
7057930 Semiconductor memory device in which source line potential is controlled in accordance with data programming mode 1 2004
* 2005/0094,441 Semiconductor memory device in which source line potential is controlled in accordance with data programming mode 0 2004
7088616 Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell 10 2005
* 2005/0135,154 Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell 1 2005
7224613 Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states 87 2005
7365018 Fabrication of semiconductor device for flash memory with increased select gate width 6 2005
* 2007/0148,973 Fabrication of semiconductor device for flash memory with increased select gate width 3 2005
7224615 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell 8 2006
7286404 Non-volatile semiconductor memory adapted to store a multi-valued data in a single memory cell 8 2006
7394692 Non-volatile semiconductor memory with large erase blocks storing cycle counts 4 2006
7596020 Multi-level nonvolatile semiconductor memory device capable of discretely controlling a charge storage layer potential based upon accumulated electrons 0 2006
* 2007/0035,996 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME 3 2006
7529131 Nonvolatile semiconductor memory, method for reading out thereof, and memory card 4 2006
* 2007/0133,288 NONVOLATILE SEMICONDUCTOR MEMORY, METHOD FOR READING OUT THEREOF, AND MEMORY CARD 7 2006
* 7376009 Semiconductor memory device which stores plural data in a cell 21 2007
7405970 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 10 2007
* 2008/0043,530 NON-VOLATILE SEMICONDUCTOR MEMORY ADAPTED TO STORE A MULTI-VALUED DATA IN A SINGLE MEMORY CELL 1 2007
7468908 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell 5 2007
7738302 Semiconductor memory device with stores plural data in a cell 13 2008
7672168 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 7 2008
* 2008/0298,129 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE ADAPTED TO STORE A MULTI-VALUED DATA IN A SINGLE MEMORY CELL 4 2008
7864591 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 7 2010
* 2010/0118,607 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE ADAPTED TO STORE A MULTI-VALUED DATA IN A SINGLE MEMORY CELL 1 2010
8154930 Semiconductor memory device which stores plural data in a cell 5 2010
8208311 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 1 2010
* 2011/0090,741 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE ADAPTED TO STORE A MULTI-VALUED DATA IN A SINGLE MEMORY CELL 1 2010
8385130 Semiconductor memory device which stores plural data in a cell 1 2012
8953371 Semiconductor storage device 0 2012
8605511 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 8 2012
8542538 Semiconductor memory device which stores plural data in a cell 2 2013
9142299 Semiconductor memory device which stores plural data in a cell 0 2013
8929135 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 2 2013
9257189 Non-volatile semiconductor memory adapted to store a multi-valued data in a single memory cell 0 2014
9390802 Semiconductor memory device which stores plural data in a cell 0 2015
9508422 Non-volatile semiconductor memory adapted to store a multi-valued data in a single memory cell 0 2015
9627048 Semiconductor memory device which stores plural data in a cell 0 2016
9734899 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 0 2016
 
WINBOND ELECTRONICS CORP. (1)
* 8659950 Semiconductor memory device 0 2013
 
SANDISK IL LTD. (22)
8059456 Programming a NAND flash memory with reduced program disturb 6 2007
* 2008/0259,684 Programming a NAND flash memory with reduced program disturb 17 2007
7679965 Flash memory with improved programming precision 4 2007
7660166 Method of improving programming precision in flash memory 2 2007
* 2008/0181,000 Method Of Improving Programming Precision In Flash Memory 40 2007
* 2008/0180,996 Flash Memory With Improved Programming Precision 7 2007
8073648 Measuring threshold voltage distribution in memory using an aggregate characteristic 13 2007
7613045 Operation sequence and commands for measuring threshold voltage distribution in memory 34 2007
* 2009/0135,646 OPERATION SEQUENCE AND COMMANDS FOR MEASURING THRESHOLD VOLTAGE DISTRIBUTION IN MEMORY 10 2007
* 2008/0285,351 MEASURING THRESHOLD VOLTAGE DISTRIBUTION IN MEMORY USING AN AGGREGATE CHARACTERISTIC 188 2007
7808819 Method for adaptive setting of state voltage levels in non-volatile memory 15 2008
7808836 Non-volatile memory with adaptive setting of state voltage levels 9 2008
* 2009/0268,516 METHOD FOR ADAPTIVE SETTING OF STATE VOLTAGE LEVELS IN NON-VOLATILE MEMORY 9 2008
* 2009/0268,517 NON-VOLATILE MEMORY WITH ADAPTIVE SETTING OF STATE VOLTAGE LEVELS 0 2008
7952928 Increasing read throughput in non-volatile memory 0 2008
* 2009/0296,487 INCREASING READ THROUGHPUT IN NON-VOLATILE MEMORY 3 2008
7848144 Reverse order page writing in flash memories 4 2008
* 2009/0310,413 REVERSE ORDER PAGE WRITING IN FLASH MEMORIES 4 2008
8009472 Method for adaptive setting of state voltage levels in non-volatile memory 8 2010
* 2011/0013,450 METHOD FOR ADAPTIVE SETTING OF STATE VOLTAGE LEVELS IN NON-VOLATILE MEMORY 4 2010
8339855 Reverse order page writing in flash memories 0 2010
* 2011/0096,603 REVERSE ORDER PAGE WRITING IN FLASH MEMORIES 2 2010
* Cited By Examiner