US Patent No: 5,774,397

Number of patents in Portfolio can not be more than 2000

Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state

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Abstract

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A non-volatile semiconductor memory device includes a semiconductor substrate, a memory cell including source and drain regions formed in a surface region of the semiconductor substrate, and a first gate insulating film, a charge storage layer, a second gate insulating film, and a control gate sequentially stacked on the semiconductor substrate, the memory cell being capable of electrically rewriting data by exchanging charges between the charge storage layer and the semiconductor substrate, and a means for applying a high potential to the semiconductor substrate and an intermediate potential to the control gate in a first data erase operation, and applying a high potential to the semiconductor substrate and a low potential to the control gate in second and subsequent data erase operations, thereby removing electrons from the charge storage layer.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
KABUSHIKI KAISHA TOSHIBATOKYO25578

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aritome, Seiichi Kawasaki, JP 290 5561
Endoh, Tetsuo Yokohama, JP 42 1952
Hemink, Gertjan Kawasaki, JP 23 2468
Shirota, Riichiro Kawasaki, JP 178 4905
Shuto, Susumu Ichikawa, JP 49 1187
Tanaka, Tomoharu Yokohama, JP 286 11579
Tanaka, Yoshiyuki Yokohama, JP 229 3398
Tanzawa, Toru Ebina, JP 208 3106

Cited Art Landscape

Patent Info (Count) # Cites Year
 
SANDISK TECHNOLOGIES LLC (2)
* 5,293,560 Multi-state flash EEPROM system using incremental programing and erasing methods 282 1992
* 5,369,615 Method for optimum erasing of EEPROM 113 1993
 
INTEL CORPORATION (1)
* 5,440,505 Method and circuitry for storing discrete amounts of charge in a single memory element 191 1994
 
FREESCALE SEMICONDUCTOR, INC. (1)
* 5,258,949 Nonvolatile memory with enhanced carrier generation and method for programming the same 49 1990
* Cited By Examiner

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (13)
* 2004/0264,264 Nonvolatile semiconductor memory device 7 2004
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* 2005/0102,466 Non-volatile semiconductor memory with large erase blocks storing cycle counts 0 2004
* 2005/0219,910 Highly compact non-volatile memory and method thereof 4 2005
7,656,710 Adaptive operations for nonvolatile memories 48 2005
* 2005/0276,101 Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states 3 2005
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* 2006/0206,770 Non-Volatile Semiconductor Memory With Large Erase Blocks Storing Cycle Counts 6 2006
* 2007/0277,528 PREMIXING INJECTOR FOR GAS TURBINE ENGINES 2 2007
* 2007/0253,250 SEMICONDUCTOR MEMORY DEVICE WHICH STORES PLURAL DATA IN A CELL 31 2007
* 2008/0068,893 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE ADAPTED TO STORE A MULTI-VALUED IN A SINGLE MEMORY CELL 1 2007
* 2008/0219,058 SEMICONDUCTOR MEMORY DEVICE WHICH STORES PLURAL DATA IN A CELL 2 2008
* 2010/0214,852 SEMICONDUCTOR MEMORY DEVICE WHICH STORES PLURAL DATA IN A CELL 0 2010
 
SanDisck Corporation LLP (1)
7,408,834 Flash controller cache architecture 23 2007
 
CYPRESS SEMICONDUCTOR CORPORATION (10)
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* 2003/0107,919 Nonvolatile semiconductor memory and method for controlling programming voltage of nonvolatile semiconductor memory 2 2002
8,072,834 Line driver circuit and method with standby mode of operation 1 2006
7,710,776 window in non-volatile static random access memory 14 2006
* 2008/0158,981 Method and apparatus for on chip sensing of SONOS VT window in non-volatile static random access memory 1 2006
7,859,925 Anti-fuse latch self-test circuit and method 2 2007
7,859,906 Circuit and method to increase read margin in non-volatile memories using a differential sensing circuit 5 2008
 
SONY CORPORATION (1)
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Micron Technology, Inc. (13)
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6,788,579 Method for programming nonvolatile memory cells with program and verify algorithm using a staircase voltage with varying step amplitude 63 2002
7,580,287 Program and read trim setting 29 2005
* 2007/0047,315 Program and read trim setting 2 2005
7,525,841 Programming method for NAND flash 14 2006
7,688,633 Method for programming a memory device suitable to minimize floating gate coupling and memory device 6 2007
* 2007/0247,917 Method for programming a memory device suitable to minimize floating gate coupling and memory device 10 2007
7,961,517 Program and read trim setting 2 2009
9,042,178 Program and read trim setting 0 2011
* 8,917,550 Apparatus comparing verified data to original data in the programming of memory cells 1 2012
* 2012/0243,333 APPARATUS COMPARING VERIFIED DATA TO ORIGINAL DATA IN THE PROGRAMMING OF MEMORY CELLS 0 2012
* 9,025,388 Method for kink compensation in a memory 0 2013
* 2014/0043,912 METHOD FOR KINK COMPENSATION IN A MEMORY 0 2013
 
SAMSUNG ELECTRONICS CO., LTD. (2)
* 2010/0195,387 NON-VOLATILE MEMORY DEVICE AND ISPP PROGRAMMING METHOD 10 2010
8,665,649 Non-volatile memory device and ISPP programming method 5 2013
 
SECURE AXCESS LLC (1)
* 6,381,670 Flash memory array having maximum and minimum threshold voltage detection for eliminating over-erasure problem and enhancing write operation 68 1997
 
HOLME ROBERTS & OWEN, LLP (1)
7,760,540 Combination SRAM and NVSRAM semiconductor memory array 11 2006
 
Innovative Memory Systems, Inc. (8)
6,891,753 Highly compact non-volatile memory and method therefor with internal serial buses 35 2002
7,045,849 Use of voids between elements in semiconductor structures for isolation 24 2003
* 2004/0232,496 Use of voids between elements in semiconductor structures for isolation 13 2003
7,085,159 Highly compact non-volatile memory and method therefor with internal serial buses 10 2005
* 2005/0207,213 Highly compact non-volatile memory and method therefor with internal serial buses 0 2005
7,569,465 Use of voids between elements in semiconductor structures for isolation 9 2005
7,447,070 Highly compact non-volatile memory and method therefor with internal serial buses 15 2006
8,977,992 Highly compact non-volatile memory and method thereof 0 2012
 
ROUND ROCK RESEARCH, LLC (1)
* 7,573,738 Mode selection in a flash memory device 1 2007
 
SANDISK TECHNOLOGIES LLC (732)
6,456,528 Selective operation of a multi-state non-volatile memory system in a binary mode 644 2001
6,967,872 Method and system for programming and inhibiting multi-level, non-volatile memory cells 47 2001
6,542,407 Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells 151 2002
6,717,847 Selective operation of a multi-state non-volatile memory system in a binary mode 224 2002
6,781,877 Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells 294 2002
7,443,757 Non-volatile memory and method with reduced bit line crosstalk errors 8 2002
7,196,931 Non-volatile memory and method with reduced source line bias errors 60 2002
6,987,693 Non-volatile memory and method with reduced neighboring field errors 63 2002
6,940,753 Highly compact non-volatile memory and method therefor with space-efficient data registers 26 2002
* 2004/0057,285 Non-volatile memory and method with reduced neighboring field errors 30 2002
* 2004/0057,318 Non-volatile memory and method with reduced bit line crosstalk errors 9 2002
6,888,755 Flash memory cell arrays having dual control gates per memory cell charge storage element 95 2002
6,847,553 Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells 34 2003
* 2003/0137,888 Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells 8 2003
7,064,980 Non-volatile memory and method with bit line coupled compensation 60 2003
7,023,736 Non-volatile memory and method with improved sensing 125 2003
6,956,770 Non-volatile memory and method with bit line compensation dependent on neighboring operating modes 120 2003
* 2005/0057,965 NON-VOLATILE MEMORY AND METHOD WITH BIT LINE COUPLED COMPENSATION 2 2003
* 2004/0109,357 Non-volatile memory and method with improved sensing 46 2003
7,212,445 Non-volatile memory and method with improved sensing 17 2003
* 2006/0050,562 NON-VOLATILE MEMORY AND METHOD WITH IMPROVED SENSING 2 2003
7,012,835 Flash memory data correction and scrub techniques 312 2003
* 2005/0073,884 Flash memory data correction and scrub techniques 80 2003
8,504,798 Management of non-volatile memory systems having large erase blocks 0 2003
7,631,138 Adaptive mode switching of flash memory address mapping based on host usage characteristics 38 2003
7,433,993 Adaptive metablocks 23 2003
7,139,864 Non-volatile memory and method with block management system 99 2003
* 2005/0144,357 Adaptive metablocks 26 2003
* 2005/0144,358 Management of non-volatile memory systems having large erase blocks 90 2003
7,594,135 Flash memory system startup operation 23 2003
* 2005/0160,217 Flash memory system startup operation 58 2003
7,154,779 Non-volatile memory cell using high-k material inter-gate programming 71 2004
* 2005/0157,549 Non-volatile memory cell using high-k material and inter-gate programming 22 2004
7,161,833 Self-boosting system for flash memory cells 56 2004
7,355,237 Shield plate for limiting cross coupling between floating gates 21 2004
7,075,823 Flash memory cell arrays having dual control gates per memory cell charge storage element 22 2004
* 2004/0165,443 Flash memory cell arrays having dual control gates per memory cell charge storage element 2 2004
7,173,863 Flash controller cache architecture 98 2004
* 7,177,977 Operating non-volatile memory without read disturb limitations 113 2004
* 2005/0210,184 Operating non-volatile memory without read disturb limitations 6 2004
6,944,068 Method and system for programming and inhibiting multi-level, non-volatile memory cells 12 2004
* 2004/0179,404 Method and system for programming and inhibiting multi-level, non-volatile memory cells 2 2004
7,177,184 Selective operation of a multi-state non-volatile memory system in a binary mode 99 2004
* 2004/0190,337 Selective operation of a multi-state non-volatile memory system in a binary mode 3 2004
7,057,939 Non-volatile memory and control with improved partial page program capability 86 2004
* 2005/0237,814 NON-VOLATILE MEMORY AND CONTROL WITH IMPROVED PARTIAL PAGE PROGRAM CAPABILITY 9 2004
* 2005/0144,363 Data boundary management 99 2004
7,177,197 Latched programming of memory and method 56 2004
* 2004/0240,269 Latched programming of memory and method 11 2004
8,429,313 Configurable ready/busy control 1 2004
* 2005/0268,025 Configurable ready/busy control 13 2004
7,548,461 Soft errors handling in EEPROM devices 0 2004
* 2004/0237,010 Soft errors handling in EEPROM devices 6 2004
7,554,842 Multi-purpose non-volatile memory card 15 2004
* 2005/0007,801 Multi-purpose non-volatile memory card 11 2004
8,375,146 Ring bus structure and its use in flash memory systems 3 2004
* 2006/0031,593 Ring bus structure and its use in flash memory systems 145 2004
8,051,257 Non-volatile memory and method with control data management 3 2004
7,437,631 Soft errors handling in EEPROM devices 4 2004
* 2005/0166,087 Non-volatile memory and method with phased program failure handling 69 2004
* 2005/0144,365 Non-volatile memory and method with control data management 94 2004
* 2005/0141,312 Non-volatile memory and method with non-sequential update block management 87 2004
* 2005/0141,313 Non-volatile memory and method with memory planes alignment 97 2004
6,870,768 Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells 102 2004
7,616,484 Soft errors handling in EEPROM devices 22 2004
7,441,067 Cyclic flash memory wear leveling 219 2004
7,395,404 Cluster auto-alignment for storing addressable data packets in a non-volatile memory array 43 2004
7,383,375 Data run programming 10 2004
7,315,916 Scratch pad block 70 2004
* 2006/0161,722 Scratch pad block 7 2004
* 2006/0136,655 Cluster auto-alignment 8 2004
7,046,568 Memory sensing circuit and method for low voltage operation 145 2004
* 2005/0169,082 Memory sensing circuit and method for low voltage operation 19 2004
* 2005/0144,367 Data run programming 16 2004
7,882,299 System and method for use of on-chip non-volatile memory write cache 2 2004
* 2006/0136,656 System and method for use of on-chip non-volatile memory write cache 43 2004
6,980,471 Substrate electron injection techniques for programming non-volatile charge storage memory cells 13 2004
* 2006/0140,007 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 187 2004
7,102,924 Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells 84 2005
7,046,548 Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells 11 2005
* 2005/0146,931 Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells 1 2005
7,877,539 Direct data file storage in flash memories 6 2005
* 2006/0184,720 Direct data file storage in flash memories 76 2005
* 2006/0184,719 Direct data file storage implementation techniques in flash memories 57 2005
* 2006/0184,718 Direct file data programming and deletion in flash memories 67 2005
7,251,160 Non-volatile memory and method with power-saving read and program-verify operations 41 2005
* 2006/0209,592 Non-volatile memory and method with power-saving read and program-verify operations 4 2005
7,206,230 Use of data latches in cache operations of non-volatile memories 77 2005
7,173,854 Non-volatile memory and method with compensation for source line bias errors 40 2005
7,170,784 Non-volatile memory and method with control gate compensation for source line bias errors 26 2005
7,158,421 Use of data latches in multi-phase programming of non-volatile memories 72 2005
* 2006/0221,697 USE OF DATA LATCHES IN MULTI-PHASE PROGRAMMING OF NON-VOLATILE MEMORIES 10 2005
* 2006/0221,694 Non-volatile memory and method with control gate compensation for source line bias errors 1 2005
* 2006/0221,704 Use of data latches in cache operations of non-volatile memories 10 2005
7,457,910 Method and system for managing partitions in a storage device 17 2005
* 2007/0002,612 Method and system for managing partitions in a storage device 14 2005
7,412,560 Non-volatile memory and method with multi-stream updating 14 2005
7,386,655 Non-volatile memory and method with improved indexing for scratch pad and update blocks 15 2005
7,366,826 Non-volatile memory and method with multi-stream update tracking 12 2005
* 2006/0155,921 Non-volatile memory and method with multi-stream update tracking 8 2005
* 2006/0155,920 Non-volatile memory and method with multi-stream updating 13 2005
7,230,854 Method for programming non-volatile memory with self-adjusting maximum program loop 11 2005
* 2007/0025,157 METHOD FOR PROGRAMMING NON-VOLATILE MEMORY WITH SELF-ADJUSTING MAXIMUM PROGRAM LOOP 64 2005
7,023,737 System for programming non-volatile memory with self-adjusting maximum program loop 34 2005
9,104,315 Systems and methods for a mass data storage system having a file-based interface to a host and a non-file-based interface to secondary storage 0 2005
7,627,733 Method and system for dual mode access for storage devices 9 2005
7,480,766 Interfacing systems operating through a logical address space and on a direct data file basis 40 2005
* 2007/0033,373 Method and system for dual mode access for storage devices 30 2005
* 2007/0033,362 Mass data storage system 56 2005
7,230,847 Substrate electron injection techniques for programming non-volatile charge storage memory cells 10 2005
* 2006/0139,998 Substrate electron injection techniques for programming non-volatile charge storage memory cells 1 2005
7,095,654 Method and system for programming and inhibiting multi-level, non-volatile memory cells 25 2005
* 2006/0007,736 Method and system for programming and inhibiting multi-level, non-volatile memory cells 0 2005
* 2007/0059,945 Atomic layer deposition with nitridation and oxidation 12 2005
* 2006/0027,882 Dielectric layer created using ALD to deposit multiple components 49 2005
* 2006/0008,999 Creating a dielectric layer using ALD to deposit multiple components 3 2005
7,239,551 Non-volatile memory and method with reduced neighboring field errors 7 2005
7,814,262 Memory system storing transformed units of data in fixed sized storage blocks 2 2005
7,529,905 Method of storing transformed units of data in a memory system having fixed sized storage blocks 79 2005
7,215,574 Non-volatile memory and method with bit line compensation dependent on neighboring operating modes 24 2005
* 2007/0088,904 Memory system storing transformed units of data in fixed sized storage blocks 27 2005
* 2007/0086,260 Method of storing transformed units of data in a memory system having fixed sized storage blocks 136 2005
* 2006/0034,121 Non-volatile memory and method with bit line compensation dependent on neighboring operating modes 6 2005
7,173,852 Corrected data storage and handling methods 161 2005
* 2006/0039,196 Corrected data storage and handling methods 88 2005
7,984,084 Non-volatile memory with scheduled reclaim operations 9 2005
7,409,489 Scheduling of reclaim operations in non-volatile memory 17 2005
* 2007/0033,324 Scheduling of reclaim operations in non-volatile memory 9 2005
7,631,162 Non-volatile memory with adaptive handling of data writes 5 2005
7,509,471 Methods for adaptively handling data writes in non-volatile memories 65 2005
7,366,022 Apparatus for programming of multi-state non-volatile memory using smart verify 14 2005
7,301,817 Method for programming of multi-state non-volatile memory using smart verify 99 2005
* 2007/0097,747 Apparatus for programming of multi-state non-volatile memory using smart verify 2 2005
* 2007/0097,749 Method for programming of multi-state non-volatile memory using smart verify 4 2005
* 2007/0101,095 Methods for adaptively handling data writes in non-volatile memories 31 2005
7,447,066 Memory with retargetable memory cell redundancy 22 2005
7,379,330 Retargetable memory cell redundancy methods 10 2005
* 2007/0103,978 Memory with retargetable memory cell redundancy 34 2005
* 2007/0103,977 Retargetable memory cell redundancy methods 10 2005
7,224,607 Flash memory data correction and scrub techniques 48 2005
* 2006/0062,048 Flash memory data correction and scrub techniques 8 2005
7,739,078 System for managing appliances 2 2005
7,353,073 Method for managing appliances 6 2005
* 2007/0129,812 Method for managing appliances 26 2005
* 7,737,483 Low resistance void-free contacts 2 2005
7,615,448 Method of forming low resistance void-free contacts 2 2005
* 2007/0128,787 Method of forming low resistance void-free contacts 17 2005
* 2007/0126,028 Low resistance void-free contacts 6 2005
7,877,540 Logically-addressed file storage methods 1 2005
* 2007/0136,555 Logically-addressed file storage methods 37 2005
7,420,847 Multi-state memory having data recovery after program fail 97 2005
7,345,928 Data recovery methods in multi-state memory after program fail 135 2005
* 2006/0126,394 Multi-state memory having data recovery after program fail 12 2005
* 2006/0126,393 Data recovery methods in multi-state memory after program fail 4 2005
7,355,888 Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages 14 2005
7,355,889 Method for programming non-volatile memory with reduced program disturb using modified pass voltages 31 2005
7,315,917 Scheduling of housekeeping operations in flash memory systems 52 2005
* 2007/0171,719 Method for programming non-volatile memory with reduced program disturb using modified pass voltages 14 2005
* 2007/0171,718 Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages 0 2005
* 2006/0161,728 Scheduling of housekeeping operations in flash memory systems 37 2005
8,683,081 Methods for displaying advertisement content on host system using application launched from removable memory device 0 2005
8,683,082 Removable memory devices for displaying advertisement content on host systems using applications launched from removable memory devices 0 2005
8,291,151 Enhanced host interface 1 2005
8,161,289 Voice controlled portable memory storage device 1 2005
7,917,949 Voice controlled portable memory storage device 3 2005
7,793,068 Dual mode access for non-volatile storage devices 3 2005
7,769,978 Method and system for accessing non-volatile storage devices 8 2005
7,747,837 Method and system for accessing non-volatile storage devices 12 2005
7,655,536 Methods of forming flash devices with shared word lines 1 2005
7,495,294 Flash devices with shared word lines 21 2005
* 2007/0156,998 Methods for memory allocation in non-volatile memories with a directly mapped file storage system 93 2005
* 2007/0143,833 Voice controlled portable memory storage device 1 2005
* 2007/0143,566 Non-volatile memories with data alignment in a directly mapped file storage system 40 2005
* 2007/0143,567 Methods for data alignment in non-volatile memories with a directly mapped file storage system 87 2005
* 2007/0143,571 Dual mode access for non-volatile storage devices 28 2005
* 2007/0143,533 Voice controlled portable memory storage device 1 2005
* 2007/0143,117 Voice controlled portable memory storage device 6 2005
* 2007/0141,780 Methods of forming flash devices with shared word lines 26 2005
* 2007/0143,570 Method and system for accessing non-volatile storage devices 20 2005
* 2007/0138,535 Flash devices with shared word lines 16 2005
* 2007/0143,532 Method and system for accessing non-volatile storage devices 50 2005
* 2007/0143,561 Methods for adaptive file data handling in non-volatile memories with a directly mapped file storage system 89 2005
* 2007/0130,521 System and method for displaying advertisement using flash memory storage devices 4 2005
* 2007/0112,625 System and method for displaying advertisement using flash memory storage devices 4 2005
* 2007/0033,327 Enhanced host interface 52 2005
8,484,632 System for program code execution with memory storage controller participation 0 2005
8,479,186 Method for program code execution with memory storage controller participation 0 2005
* 2007/0150,884 System for program code execution 5 2005
* 2007/0150,885 Method for program code execution 4 2005
7,436,703 Active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices 9 2005
7,362,615 Methods for active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices 14 2005
* 2007/0147,118 METHODS FOR ACTIVE BOOSTING TO MINIMIZE CAPACITIVE COUPLING EFFECT BETWEEN ADJACENT GATES OF FLASH MEMORY DEVICES 2 2005
* 2007/0147,119 Active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices 0 2005
7,466,590 Self-boosting method for flash memory cells 1 2005
7,327,619 Reference sense amplifier for non-volatile memory 8 2005
7,324,393 Method for compensated sensing in non-volatile memory 38 2005
* 2006/0198,195 Self-boosting method for flash memory cells 3 2005
* 2006/0158,947 Reference sense amplifier for non-volatile memory 8 2005
* 2006/0158,935 Method for compensated sensing in non-volatile memory 3 2005
7,733,704 Non-volatile memory with power-saving multi-pass sensing 2 2005
7,447,094 Method for power-saving multi-pass sensing in non-volatile memory 2 2005
7,443,726 Systems for alternate row-based reading and writing for non-volatile memory 10 2005
* 7,352,629 Systems for continued verification in non-volatile memory write operations 11 2005
7,349,260 Alternate row-based reading and writing for non-volatile memory 7 2005
7,310,255 Non-volatile memory with improved program-verify operations 85 2005
* 7,307,887 Continued verification in non-volatile memory write operations 13 2005
* 2007/0171,746 Non-volatile memory with power-saving multi-pass sensing 8 2005
* 2007/0171,725 Non-volatile memory with improved program-verify operations 1 2005
* 2007/0153,583 Alternate row-based reading and writing for non-volatile memory 4 2005
* 2007/0153,604 Method for power-saving multi-pass sensing in non-volatile memory 7 2005
* 2007/0153,577 Systems for alternate row-based reading and writing for non-volatile memory 2 2005
7,224,614 Methods for improved program-verify operations in non-volatile memories 38 2005
* 2006/0184,722 Direct data file storage implementation techniques in flash memories 81 2006
* 2006/0184,723 Direct file data programming and deletion in flash memories 82 2006
7,394,690 Method for column redundancy using data latches in solid-state memories 6 2006
7,352,635 Method for remote redundancy for non-volatile memory 6 2006
7,324,389 Non-volatile memory with redundancy data buffered in remote buffer circuits 8 2006
* 2007/0223,292 Method for column redundancy using data latches in solid-state memories 1 2006
* 2007/0220,935 NON-VOLATILE MEMORY WITH REDUNDANCY DATA BUFFERED IN REMOTE BUFFER CIRCUITS 8 2006
7,224,605 Non-volatile memory with redundancy data buffered in data latches for defective locations 22 2006
7,511,995 Self-boosting system with suppression of high lateral electric fields 5 2006
7,428,165 Self-boosting method with suppression of high lateral electric fields 0 2006
* 2007/0236,992 Self-boosting method with suppression of high lateral electric fields 2 2006
* 2007/0236,993 Self-boosting system with suppression of high lateral electric fields 10 2006
7,206,231 System for programming non-volatile memory with self-adjusting maximum program loop 6 2006
* 2007/0025,156 System for programming non-volatile memory with self-adjusting maximum program loop 0 2006
7,951,669 Methods of making flash memory cell arrays having dual control gates per memory cell charge storage element 28 2006
7,467,253 Cycle count storage systems 28 2006
7,451,264 Cycle count storage methods 18 2006
7,502,261 Flash memory cell arrays having dual control gates per memory cell charge storage element 8 2006
7,486,555 Flash memory cell arrays having dual control gates per memory cell charge storage element 3 2006
7,303,956 Flash memory cell arrays having dual control gates per memory cell charge storage element 8 2006
* 2006/0205,120 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 2 2006
* 2006/0187,714 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 5 2006
* 2006/0176,736 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 7 2006
7,440,322 Method and system for flash memory devices 5 2006
7,516,261 Method for U3 adapter 2 2006
7,447,821 U3 adapter 3 2006
* 2008/0005,413 Method for U3 adapter 0 2006
* 2007/0250,655 U3 adapter 0 2006
7,619,922 Method for non-volatile memory with background data latch caching during erase operations 41 2006
7,609,552 Non-volatile memory with background data latch caching during erase operations 1 2006
7,505,320 Non-volatile memory with background data latch caching during program operations 20 2006
7,502,260 Method for non-volatile memory with background data latch caching during program operations 19 2006
7,486,558 Non-volatile memory with managed execution of cached data 6 2006
7,480,181 Non-volatile memory with background data latch caching during read operations 12 2006
7,463,521 Method for non-volatile memory with managed execution of cached data 38 2006
7,447,078 Method for non-volatile memory with background data latch caching during read operations 22 2006
7,436,709 NAND flash memory with boosting 10 2006
* 2007/0258,286 BOOSTING METHODS FOR NAND FLASH MEMORY 16 2006
7,286,408 Boosting methods for NAND flash memory 10 2006
7,280,396 Non-volatile memory and control with improved partial page program capability 8 2006
* 2007/0002,626 Non-Volatile Memory with Managed Execution of Cached Data 21 2006
* 2006/0233,022 Non-Volatile Memory with Background Data Latch Caching During Program Operations 21 2006
* 2006/0233,010 Non-Volatile Memory with Background Data Latch Caching During Read Operations 28 2006
* 2006/0233,021 Non-Volatile Memory with Background Data Latch Caching During Erase Operations 19 2006
* 2006/0233,023 Method for Non-Volatile Memory with Background Data Latch Caching During Erase Operations 39 2006
8,055,832 Management of memory blocks that directly store data files 2 2006
7,581,057 Memory system with management of memory blocks that directly store data files 2 2006
7,558,905 Reclaiming data storage capacity in flash memory systems 2 2006
7,450,420 Reclaiming data storage capacity in flash memories 75 2006
* 2007/0030,734 Reclaiming Data Storage Capacity in Flash Memories 16 2006
* 2007/0033,328 Management of Memory Blocks That Directly Store Data Files 35 2006
* 2007/0033,330 Reclaiming Data Storage Capacity in Flash Memory Systems 57 2006
7,840,875 Convolutional coding methods for nonvolatile memory 2 2006
7,376,030 Memory sensing circuit and method for low voltage operation 12 2006
* 2007/0266,296 Nonvolatile Memory with Convolutional Coding 50 2006
* 2007/0266,295 Convolutional Coding Methods for Nonvolatile Memory 39 2006
7,518,911 Method and system for programming multi-state non-volatile memory devices 5 2006
* 2010/0024,732 Systems for Flash Heating in Atomic Layer Deposition 2 2006
7,638,834 Flash memory cell arrays having dual control gates per memory cell charge storage element 3 2006
* 2007/0281,082 Flash Heating in Atomic Layer Deposition 9 2006
* 2007/0277,735 Systems for Atomic Layer Deposition of Oxides Using Krypton as an Ion Generating Feeding Gas 6 2006
7,269,069 Non-volatile memory and method with bit line to bit line coupled compensation 13 2006
* 2006/0202,256 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 25 2006
7,391,650 Method for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates 16 2006
7,342,831 System for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates 91 2006
* 2007/0291,566 METHOD FOR OPERATING NON-VOLATILE MEMORY USING TEMPERATURE COMPENSATION OF VOLTAGES OF UNSELECTED WORD LINES AND SELECT GATES 5 2006
7,492,633 System for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines 4 2006
7,349,261 Method for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines 7 2006
* 2007/0291,543 METHOD FOR INCREASING PROGRAMMING SPEED FOR NON-VOLATILE MEMORY BY APPLYING COUNTER-TRANSITIONING WAVEFORMS TO WORD LINES 3 2006
7,489,549 System for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 22 2006
7,486,561 Method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 10 2006
* 2007/0297,245 SYSTEM FOR NON-REAL TIME REPROGRAMMING OF NON-VOLATILE MEMORY TO ACHIEVE TIGHTER DISTRIBUTION OF THRESHOLD VOLTAGES 10 2006
* 2007/0297,226 METHOD FOR NON-REAL TIME REPROGRAMMING OF NON-VOLATILE MEMORY TO ACHIEVE TIGHTER DISTRIBUTION OF THRESHOLD VOLTAGES 41 2006
* 2006/0245,245 NON-VOLATILE MEMORY CELL USING HIGH-K MATERIAL AND INTER-GATE PROGRAMMING 14 2006
7,949,845 Indexing of file data in reprogrammable non-volatile memories that directly store data files 0 2006
7,669,003 Reprogrammable non-volatile memory systems with indexing of directly stored data files 2 2006
7,558,906 Methods of managing blocks in nonvolatile memory 3 2006
7,552,271 Nonvolatile memory with block management 66 2006
* 2007/0033,375 Indexing of File Data in Reprogrammable Non-Volatile Memories That Directly Store Data Files 38 2006
* 2007/0033,374 Reprogrammable Non-Volatile Memory Systems With Indexing of Directly Stored Data Files 50 2006
7,610,437 Data consolidation and garbage collection in direct data file storage memories 6 2006
7,590,794 Data operations in flash memories utilizing direct data file storage 2 2006
7,590,795 Flash memory systems utilizing direct data file storage 5 2006
7,562,181 Flash memory systems with direct data file storage utilizing data consolidation and garbage collection 4 2006
* 2007/0186,032 Flash Memory Systems With Direct Data File Storage Utilizing Data Consolidation and Garbage Collection 57 2006
* 2007/0033,376 Data Consolidation and Garbage Collection in Direct Data File Storage Memories 47 2006
7,440,326 Programming non-volatile memory with improved boosting 18 2006
7,405,968 Non-volatile memory cell using high-K material and inter-gate programming 40 2006
* 2007/0025,145 NON-VOLATILE MEMORY CELL USING HIGH-K MATERIAL AND INTER-GATE PROGRAMMING 4 2006
7,734,861 Pseudo random and command driven bit compensation for the cycling effects in flash memory 8 2006
7,606,966 Methods in a pseudo random and command driven bit compensation for the cycling effects in flash memory 5 2006
* 2008/0065,812 PSEUDO RANDOM AND COMMAND DRIVEN BIT COMPENSATION FOR THE CYCLING EFFECTS IN FLASH MEMORY 8 2006
7,606,077 Non-volatile memory with reduced erase/write cycling during trimming of initial programming voltage 7 2006
7,606,091 Method for non-volatile memory with reduced erase/write cycling during trimming of initial programming voltage 9 2006
7,599,223 Non-volatile memory with linear estimation of initial programming voltage 6 2006
7,453,731 Method for non-volatile memory with linear estimation of initial programming voltage 11 2006
* 2008/0062,785 Non-Volatile Memory With Reduced Erase/Write Cycling During Trimming of Initial Programming Voltage 4 2006
* 2008/0062,768 Method for Non-Volatile Memory With Reduced Erase/Write Cycling During Trimming of Initial Programming Voltage 10 2006
7,696,044 Method of making an array of non-volatile memory cells with floating gates formed of spacers in substrate trenches 0 2006
7,646,054 Array of non-volatile memory cells with floating gates formed of spacers in substrate trenches 5 2006
* 2008/0070,363 Method of Making an Array of Non-Volatile Memory Cells With Floating Gates Formed of Spacers in Substrate Trenches 8 2006
7,957,185 Non-volatile memory and method with power-saving read and program-verify operations 4 2006
7,570,513 Non-volatile memory and method with power-saving read and program-verify operations 9 2006
* 2007/0014,161 Non-Volatile Memory and Method With Power-Saving Read and Program-Verify Operations 13 2006
* 2007/0014,156 Non-Volatile Memory and Method With Power-Saving Read and Program-Verify Operations 2 2006
8,189,378 Reducing program disturb in non-volatile storage 1 2006
8,184,478 Apparatus with reduced program disturb in non-volatile storage 0 2006
7,886,204 Methods of cell population distribution assisted read margining 3 2006
7,716,538 Memory with cell population distribution assisted read margining 61 2006
* 2008/0084,748 APPARATUS WITH REDUCED PROGRAM DISTURB IN NON-VOLATILE STORAGE 5 2006
* 2008/0084,747 REDUCING PROGRAM DISTURB IN NON-VOLATILE STORAGE 3 2006
* 2008/0077,841 Methods of Cell Population Distribution Assisted Read Margining 64 2006
* 2008/0077,842 Memory with Cell Population Distribution Assisted Read Margining 8 2006
7,977,186 Providing local boosting control implant for non-volatile memory 1 2006
7,904,783 Soft-input soft-output decoder for nonvolatile memory 65 2006
7,818,653 Methods of soft-input soft-output decoding for nonvolatile memory 9 2006
7,805,663 Methods of adapting operation of nonvolatile memory 76 2006
7,705,387 Non-volatile memory with local boosting control implant 3 2006
* 2008/0092,015 Nonvolatile memory with adaptive operation 25 2006
* 2008/0092,026 Methods of Soft-Input Soft-Output Decoding for Nonvolatile Memory 113 2006
* 2008/0081,419 PROVIDING LOCAL BOOSTING CONTROL IMPLANT FOR NON-VOLATILE MEMORY 4 2006
* 2008/0082,897 Soft-Input Soft-Output Decoder for Nonvolatile Memory 94 2006
* 2008/0079,052 NON-VOLATILE MEMORY WITH LOCAL BOOSTING CONTROL IMPLANT 3 2006
7,684,247 Reverse reading in non-volatile memory with compensation for coupling 4 2006
7,675,802 Dual voltage flash memory card 6 2006
7,656,735 Dual voltage flash memory methods 0 2006
7,447,076 Systems for reverse reading in non-volatile memory with compensation for coupling 7 2006
* 2008/0091,901 Method for non-volatile memory with worst-case control data management 10 2006
7,372,748 Voltage regulator in a non-volatile memory device 0 2006
* 2008/0089,141 VOLTAGE REGULATOR IN A NON-VOLATILE MEMORY DEVICE 1 2006
7,691,710 Fabricating non-volatile memory with dual voltage select gate structure 7 2006
7,616,490 Programming non-volatile memory with dual voltage select gate structure 10 2006
7,586,157 Non-volatile memory with dual voltage select gate structure 4 2006
* 2008/0089,128 PROGRAMMING NON-VOLATILE MEMORY WITH DUAL VOLTAGE SELECT GATE STRUCTURE 1 2006
* 2008/0090,351 FABRICATING NON-VOLATILE MEMORY WITH DUAL VOLTAGE SELECT GATE STRUCTURE 2 2006
* 2008/0089,127 NON-VOLATILE MEMORY WITH DUAL VOLTAGE SELECT GATE STRUCTURE 20 2006
7,596,031 Faster programming of highest multi-level state for non-volatile memory 12 2006
8,001,441 Nonvolatile memory with modulated error correction coding 12 2006
7,904,780 Methods of modulating error correction coding 48 2006
7,904,788 Methods of varying read threshold voltage in nonvolatile memory 12 2006
7,558,109 Nonvolatile memory with variable read threshold 162 2006
* 2008/0123,419 Methods of Varying Read Threshold Voltage in Nonvolatile Memory 21 2006
* 2008/0109,703 Nonvolatile Memory With Modulated Error Correction Coding 35 2006
7,696,035 Method for fabricating non-volatile memory with boost structures 3 2006
7,508,710 Operating non-volatile memory with boost structures 77 2006
7,508,703 Non-volatile memory with boost structures 3 2006
* 2008/0112,226 NON-VOLATILE MEMORY WITH BOOST STRUCTURES 23 2006
* 2008/0113,479 FABRICATING NON-VOLATILE MEMORY WITH BOOST STRUCTURES 6 2006
7,508,721 Use of data latches in multi-phase programming of non-volatile memories 26 2006
* 2007/0097,744 Use of Data Latches in Multi-Phase Programming of Non-Volatile Memories 5 2006
7,623,386 Reducing program disturb in non-volatile storage using early source-side boosting 6 2006
7,623,387 Non-volatile storage with early source-side boosting for reducing program disturb 7 2006
7,471,566 Self-boosting system for flash memory cells 7 2006
* 2008/0137,426 NON-VOLATILE STORAGE WITH EARLY SOURCE-SIDE BOOSTING FOR REDUCING PROGRAM DISTURB 2 2006
7,800,161 Flash NAND memory cell array with charge storage elements positioned in trenches 8 2006
7,642,160 Method of forming a flash NAND memory cell array with charge storage elements positioned in trenches 3 2006
* 2008/0149,996 Flash NAND Memory Cell Array With Charge Storage Elements Positioned in Trenches 3 2006
* 2008/0153,226 Method of Forming a Flash NAND Memory Cell Array With Charge Storage Elements Positioned in Trenches 8 2006
8,209,461 Configuration of host LBA interface with flash memory 1 2006
8,166,267 Managing a LBA interface in a direct data file memory system 3 2006
8,046,522 Use of a direct data file system with a continuous logical address space interface and control of file address storage in logical blocks 0 2006
7,917,686 Host system with direct data file interface configurability 0 2006
7,739,444 System using a direct data file system with a continuous logical address space interface 2 2006
* 2008/0155,176 Host System With Direct Data File Interface Configurability 10 2006
* 2008/0155,227 Managing a LBA Interface in a Direct Data File Memory System 16 2006
* 2008/0155,178 Use of a Direct Data File System With a Continuous Logical Address Space Interface 16 2006
* 2008/0155,175 Host System That Manages a LBA Interface With Flash Memory 21 2006
7,570,520 Non-volatile storage system with initial programming voltage based on trial 87 2006
7,551,482 Method for programming with initial programming voltage based on trial 7 2006
* 2008/0158,980 NON-VOLATILE STORAGE SYSTEM WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL 11 2006
* 2008/0158,979 METHOD FOR PROGRAMMING WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL 12 2006
7,890,723 Method for code execution 0 2006
7,890,724 System for code execution 0 2006
7,489,547 Method of NAND flash memory cell array with adaptive memory state partitioning 9 2006
7,489,548 NAND flash memory cell array with adaptive memory state partitioning 3 2006
7,468,918 Systems for programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data 14 2006
7,463,531 Systems for programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages 17 2006
7,450,430 Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages 20 2006
7,433,241 Programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data 23 2006
* 2008/0159,002 PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY REMOVING PRE-CHARGE DEPENDENCY ON WORD LINE DATA 10 2006
* 2008/0159,004 PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY USING DIFFERENT PRE-CHARGE ENABLE VOLTAGES 7 2006
* 2008/0162,775 SYSTEM FOR CODE EXECUTION 1 2006
* 2008/0159,003 SYSTEMS FOR PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY REMOVING PRE-CHARGE DEPENDENCY ON WORD LINE DATA 4 2006
7,583,535 Biasing non-volatile storage to compensate for temperature variations 24 2006
7,583,539 Non-volatile storage with bias for temperature compensation 9 2006
7,554,853 Non-volatile storage with bias based on selective word line 3 2006
7,525,843 Non-volatile storage with adaptive body bias 7 2006
7,468,919 Biasing non-volatile storage based on selected word line 24 2006
7,468,920 Applying adaptive body bias to non-volatile storage 11 2006
* 2008/0158,976 BIASING NON-VOLATILE STORAGE BASED ON SELECTED WORD LINE 3 2006
* 2008/0158,970 BIASING NON-VOLATILE STORAGE TO COMPENSATE FOR TEMPERATURE VARIATIONS 8 2006
* 2008/0158,992 NON-VOLATILE STORAGE WITH ADAPTIVE BODY BIAS 4 2006
* 2008/0158,975 NON-VOLATILE STORAGE WITH BIAS FOR TEMPERATURE COMPENSATION 10 2006
* 2008/0158,960 APPLYING ADAPTIVE BODY BIAS TO NON-VOLATILE STORAGE 2 2006
7,577,037 Use of data latches in cache operations of non-volatile memories 5 2007
7,385,854 Selective operation of a multi-state non-volatile memory system in a binary mode 3 2007
* 2007/0109,864 Selective Operation of a Multi-State Non-Volatile Memory System in a Binary Mode 2 2007
7,551,484 Non-volatile memory and method with reduced source line bias errors 0 2007
* 2007/0109,889 Non-Volatile Memory and Method With Reduced Source Line Bias Errors 1 2007
7,660,156 NAND flash memory with a programming voltage held dynamically in a NAND chain channel region 2 2007
* 2007/0109,859 Latched Programming of Memory and Method 2 2007
7,428,171 Non-volatile memory and method with improved sensing 0 2007
* 2007/0109,847 Non-Volatile Memory and Method With Improved Sensing 1 2007
7,391,645 Non-volatile memory and method with compensation for source line bias errors 5 2007
7,391,646 Non-volatile memory and method with control gate compensation for source line bias errors 3 2007
7,573,773 Flash memory with data refresh triggered by controlled scrub data reads 7 2007
7,477,547 Flash memory refresh techniques triggered by controlled scrub data reads 22 2007
* 2008/0239,808 Flash Memory Refresh Techniques Triggered by Controlled Scrub Data Reads 9 2007
* 2008/0239,851 Flash Memory with Data Refresh Triggered by Controlled Scrub Data Reads 3 2007
7,904,793 Method for decoding data in non-volatile storage using reliability metrics based on multiple reads 35 2007
7,797,480 Method for reading non-volatile storage using pre-conditioning waveforms and modified reliability metrics 3 2007
* 2008/0250,300 METHOD FOR DECODING DATA IN NON-VOLATILE STORAGE USING RELIABILITY METRICS BASED ON MULTIPLE READS 52 2007
* 2008/0244,162 METHOD FOR READING NON-VOLATILE STORAGE USING PRE-CONDITIONING WAVEFORMS AND MODIFIED RELIABILITY METRICS 11 2007
7,606,071 Compensating source voltage drop in non-volatile storage 7 2007
7,606,072 Non-volatile storage with compensation for source voltage drop 2 2007
7,606,079 Reducing power consumption during read operations in non-volatile storage 6 2007
* 2008/0266,975 NON-VOLATILE STORAGE WITH REDUCED POWER CONSUMPTION DURING READ OPERATIONS 4 2007
* 2008/0266,973 REDUCING POWER CONSUMPTION DURING READ OPERATIONS IN NON-VOLATILE STORAGE 24 2007
7,440,327 Non-volatile storage with reduced power consumption during read operations 6 2007
7,463,522 Non-volatile storage with boosting using channel isolation switching 1 2007
7,460,404 Boosting for non-volatile storage using channel isolation switching 6 2007
* 2008/0279,008 NON-VOLATILE STORAGE WITH BOOSTING USING CHANNEL ISOLATION SWITCHING 3 2007
* 2008/0279,007 BOOSTING FOR NON-VOLATILE STORAGE USING CHANNEL ISOLATION SWITCHING 1 2007
7,518,919 Flash memory data correction and scrub techniques 22 2007
7,443,736 Substrate electron injection techniques for programming non-volatile charge storage memory cells and for controlling program disturb 7 2007
* 2008/0294,814 Flash Memory System with Management of Housekeeping Operations 34 2007
* 2008/0294,813 Managing Housekeeping Operations in Flash Memory 16 2007
7,447,081 Methods for improved program-verify operations in non-volatile memories 21 2007
* 2007/0230,250 Methods for Improved Program-Verify Operations in Non-Volatile Memories 1 2007
8,713,283 Method of interfacing a host operating through a logical address space with a direct file storage medium 1 2007
* 2008/0307,155 Method of Interfacing A Host Operating Through A Logical Address Space With A Direct File STorage Medium 8 2007
7,849,383 Systems and methods for reading nonvolatile memory using multiple reading schemes 10 2007
* 2008/0320,346 SYSTEMS FOR READING NONVOLATILE MEMORY 8 2007
7,545,678 Non-volatile storage with source bias all bit line sensing 7 2007
7,539,060 Non-volatile storage using current sensing with biasing of source and P-Well 1 2007
7,532,516 Non-volatile storage with current sensing of negative threshold voltages 3 2007
7,489,554 Method for current sensing with biasing of source and P-well in non-volatile storage 3 2007
* 2009/0003,068 METHOD FOR SOURCE BIAS ALL BIT LINE SENSING IN NON-VOLATILE STORAGE 2 2007
7,471,567 Method for source bias all bit line sensing in non-volatile storage 13 2007
7,447,079 Method for sensing negative threshold voltages in non-volatile storage using current sensing 26 2007
* 2008/0247,239 METHOD FOR CURRENT SENSING WITH BIASING OF SOURCE AND P-WELL IN NON-VOLATILE STORAGE 0 2007
* 2008/0247,253 NON-VOLATILE STORAGE WITH TEMPERATURE COMPENSATION FOR BIT LINE DURING SENSE OPERATIONS 21 2007
7,522,457 Systems for erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage 15 2007
7,457,166 Erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage 22 2007
* 2008/0019,164 Systems for Erase Voltage Manipulation in Non-Volatile Memory for Controlled Shifts in Threshold Voltage 4 2007
* 2008/0013,360 Erase Voltage Manipulation in Non-Volatile Memory for Controlled Shifts in Threshold Voltage 1 2007
7,471,575 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 5 2007
* 2007/0263,450 Non-Volatile Memory and Method with Shared Processing for an Aggregate of Read/Write Circuits 5 2007
7,532,514 Non-volatile memory and method with bit line to bit line coupled compensation 29 2007
* 2007/0297,234 Non-Volatile Memory And Method With Bit Line To Bit Line Coupled Compensation 82 2007
7,885,112 Nonvolatile memory and method for on-chip pseudo-randomization of data within a page and between pages 6 2007
* 2009/0067,244 NONVOLATILE MEMORY AND METHOD FOR ON-CHIP PSEUDO-RANDOMIZATION OF DATA WITHIN A PAGE AND BETWEEN PAGES 24 2007
7,894,269 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells 6 2007
7,652,929 Non-volatile memory and method for biasing adjacent word line for verify during programming 14 2007
* 2009/0073,771 Non-Volatile Memory and Method for Biasing Adjacent Word Line for Verify During Programming 13 2007
* 2008/0019,188 Nonvolatile Memory and Method for Compensating During Programming for Perturbing Charges of Neighboring Cells 26 2007
8,026,170 Method of forming a single-layer metal conductors with multiple thicknesses 3 2007
7,577,034 Reducing programming voltage differential nonlinearity in non-volatile storage 5 2007
* 2009/0080,263 REDUCING PROGRAMMING VOLTAGE DIFFERENTIAL NONLINEARITY IN NON-VOLATILE STORAGE 10 2007
* 2009/0080,229 SINGLE-LAYER METAL CONDUCTORS WITH MULTIPLE THICKNESSES 10 2007
7,492,634 Method for programming of multi-state non-volatile memory using smart verify 10 2007
* 2009/0088,876 PORTABLE, DIGITAL MEDIA PLAYER AND ASSOCIATED METHODS 7 2007
7,453,735 Non-volatile memory and control with improved partial page program capability 6 2007
7,573,747 Alternate row-based reading and writing for non-volatile memory 1 2007
* 2008/0049,506 Alternate Row-Based Reading and Writing for Non-Volatile Memory 74 2007
8,296,498 Method and system for virtual fast access non-volatile RAM 4 2007
7,411,827 Boosting to control programming of non-volatile memory 10 2007
7,565,478 Scheduling of housekeeping operations in flash memory systems 6 2007
* 2008/0091,872 Scheduling of Housekeeping Operations in Flash Memory Systems 37 2007
7,688,638 Faster programming of multi-level non-volatile storage through reduced verify operations 6 2007
* 2009/0147,573 FASTER PROGRAMMING OF MULTI-LEVEL NON-VOLATILE STORAGE THROUGH REDUCED VERIFY OPERATIONS 18 2007
7,609,556 Non-volatile memory with improved program-verify operations 4 2007
7,463,528 Temperature compensation of select gates in non-volatile memory 25 2007
7,460,407 Temperature compensation of voltages of unselected word lines in non-volatile memory based on word line position 8 2007
* 2008/0094,908 TEMPERATURE COMPENSATION OF VOLTAGES OF UNSELECTED WORD LINES IN NON-VOLATILE MEMORY BASED ON WORD LINE POSITION 4 2007
* 2008/0094,930 TEMPERATURE COMPENSATION OF SELECT GATES IN NON-VOLATILE MEMORY 2 2007
7,764,547 Regulation of source potential to combat cell source IR drop 9 2007
7,701,761 Read, verify word line reference voltage to track source level 5 2007
8,880,483 System and method for implementing extensions to intelligently manage resources of a mass storage system 0 2007
* 2009/0164,705 System and Method for Implementing Extensions to Intelligently Manage Resources of a Mass Storage System 13 2007
7,468,921 Method for increasing programming speed for non-volatile memory by applying direct-transitioning waveforms to word lines 0 2008
7,567,466 Non-volatile memory with redundancy data buffered in remote buffer circuits 3 2008
7,593,277 Method for compensated sensing in non-volatile memory 1 2008
* 2008/0117,701 Method For Compensated Sensing In Non-Volatile Memory 4 2008
7,834,386 Non-volatile memory with epitaxial regions for limiting cross coupling between floating gates 0 2008
7,807,533 Method for forming non-volatile memory with shield plate for limiting cross coupling between floating gates 4 2008
* 2008/0116,502 NON-VOLATILE MEMORY WITH EPITAXIAL REGIONS FOR LIMITING CROSS COUPLING BETWEEN FLOATING GATES 3 2008
8,239,639 Method and apparatus for providing data type and host file information to a mass storage system 3 2008
* 2008/0307,158 METHOD AND APPARATUS FOR PROVIDING DATA TYPE AND HOST FILE INFORMATION TO A MASS STORAGE SYSTEM 25 2008
8,429,352 Method and system for memory block flushing 6 2008
* 2008/0307,192 Method And System For Storage Address Re-Mapping For A Memory Device 69 2008
* 2008/0307,164 Method And System For Memory Block Flushing 18 2008
7,577,026 Source and drain side early boosting using local self boosting for non-volatile storage 1 2008
7,606,076 Sensing in non-volatile storage using pulldown to regulated source voltage to remove system noise 11 2008
* 2008/0247,241 SENSING IN NON-VOLATILE STORAGE USING PULLDOWN TO REGULATED SOURCE VOLTAGE TO REMOVE SYSTEM NOISE 5 2008
7,915,664 Non-volatile memory with sidewall channels and raised source/drain regions 0 2008
* 2009/0261,398 NON-VOLATILE MEMORY WITH SIDEWALL CHANNELS AND RAISED SOURCE/DRAIN REGIONS 7 2008
* 2009/0271,562 Method and system for storage address re-mapping for a multi-bank memory device 105 2008
8,051,240 Compensating non-volatile storage using different pass voltages during program-verify and read 7 2008
* 2009/0282,184 COMPENSATING NON-VOLATILE STORAGE USING DIFFERENT PASS VOLTAGES DURING PROGRAM-VERIFY AND READ 6 2008
7,719,902 Enhanced bit-line pre-charge scheme for increasing channel boosting in non-volatile storage 3 2008
7,826,271 Nonvolatile memory with index programming and reduced verify 8 2008
* 7,813,172 Nonvolatile memory with correlated multiple pass programming 3 2008
7,800,945 Method for index programming and reduced verify in nonvolatile memory 8 2008
7,796,435 Method for correlated multiple pass programming in nonvolatile memory 4 2008
* 2009/0310,421 Nonvolatile Memory with Correlated Multiple Pass Programming 6 2008
* 2008/0250,202 FLASH CONTROLLER CACHE ARCHITECTURE 3 2008
7,499,324 Non-volatile memory and method with control gate compensation for source line bias errors 11 2008
7,800,956 Programming algorithm to reduce disturb with minimal extra time penalty 12 2008
7,751,249 Minimizing power noise during sensing in memory device 4 2008
7,751,250 Memory device with power noise minimization during sensing 4 2008
7,663,950 Method for column redundancy using data latches in solid-state memories 1 2008
* 2008/0266,957 Method for Column Redundancy Using Data Latches in Solid-State Memories 19 2008
8,151,035 Non-volatile memory and method with multi-stream updating 5 2008
* 2008/0301,359 Non-Volatile Memory and Method With Multi-Stream Updating 8 2008
8,103,841 Non-volatile memory and method with non-sequential update block management 2 2008
7,913,061 Non-volatile memory and method with memory planes alignment 12 2008
* 2009/0019,217 Non-Volatile Memory And Method With Memory Planes Alignment 5 2008
* 2009/0019,218 Non-Volatile Memory And Method With Non-Sequential Update Block Management 83 2008
7,945,759 Non-volatile memory and method with phased program failure handling 5 2008
* 2009/0037,651 Non-Volatile Memory and Method with Phased Program Failure Handling 28 2008
7,853,772 Method for managing partitions in a storage device 17 2008
* 2009/0043,984 METHOD FOR MANAGING PARTITIONS IN A STORAGE DEVICE 13 2008
7,733,703 Method for non-volatile memory with background data latch caching during read operations 3 2008
* 2009/0067,253 Method for Non-Volatile Memory With Background Data Latch Caching During Read Operations 7 2008
7,773,414 Self-boosting system for flash memory cells 2 2008
* 2009/0073,761 Self-Boosting System for Flash Memory Cells 5 2008
7,751,244 Applying adaptive body bias to non-volatile storage based on number of programming cycles 3 2008
7,817,476 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 1 2008
* 2009/0103,369 Non-Volatile Memory and Method with Shared Processing for an Aggregate of Read/Write Circuits 1 2008
7,633,802 Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 82 2008
* 2009/0103,356 NON-REAL TIME REPROGRAMMING OF NON-VOLATILE MEMORY TO ACHIEVE TIGHTER DISTRIBUTION OF THRESHOLD VOLTAGES 5 2008
8,700,840 Nonvolatile memory with write cache having flush/eviction methods 3 2009
8,244,960 Non-volatile memory and method with write cache partition management methods 26 2009
8,094,500 Non-volatile memory and method with write cache partitioning 17 2009
8,040,744 Spare block management of non-volatile memories 82 2009
* 2010/0174,846 Nonvolatile Memory With Write Cache Having Flush/Eviction Methods 38 2009
* 2010/0172,179 Spare Block Management of Non-Volatile Memories 95 2009
8,621,323 Pipelined data relocation and improved chip architectures 0 2009
* 2009/0125,785 Pipelined Data Relocation and Improved Chip Architectures 18 2009
7,864,570 Self-boosting system with suppression of high lateral electric fields 2 2009
* 2009/0147,571 SELF-BOOSTING SYSTEM WITH SUPPRESSION OF HIGH LATERAL ELECTRIC FIELDS 1 2009
8,004,895 Flash memory data correction and scrub techniques 4 2009
7,790,562 Method for angular doping of source and drain regions for odd and even NAND blocks 2 2009
* 2009/0233,412 METHOD FOR ANGULAR DOPING OF SOURCE AND DRAIN REGIONS FOR ODD AND EVEN NAND BLOCKS 1 2009
7,983,065 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines 60 2009
8,117,380 Management of non-volatile memory systems having large erase blocks 1 2009
* 2009/0216,938 Management Of Non-Volatile Memory Systems Having Large Erase Blocks 7 2009
8,027,195 Folding data stored in binary format into multi-state format within non-volatile memory devices 28 2009
* 2010/0309,719 Folding Data Stored in Binary Format Into Multi-State Format Within Non-Volatile Memory Devices 14 2009
7,962,777 Flash memory system startup operation 10 2009
* 2009/0254,776 Flash Memory System Startup Operation 5 2009
7,974,124 Pointer based column selection techniques in non-volatile memories 2 2009
* 2010/0329,007 Pointer Based Column Selection Techniques in Non-Volatile Memories 21 2009
7,768,834 Non-volatile storage system with initial programming voltage based on trial 2 2009
* 2009/0257,282 NON-VOLATILE STORAGE SYSTEM WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL 4 2009
8,364,883 Scheduling of housekeeping operations in flash memory systems 0 2009
* 2009/0265,508 Scheduling of Housekeeping Operations in Flash Memory Systems 11 2009
7,936,602 Use of data latches in cache operations of non-volatile memories 2 2009
* 2011/0002,169 Bad Column Management with Bit Information in Non-Volatile Memory Systems 20 2009
7,907,458 Non-volatile memory with redundancy data buffered in remote buffer circuits 0 2009
* 2009/0273,986 Non-Volatile Memory With Redundancy Data Buffered in Remote Buffer Circuits 1 2009
7,852,678 Non-volatile memory with improved sensing by reducing source line current 4 2009
7,889,560 Alternate row-based reading and writing for non-volatile memory 4 2009
7,839,685 Soft errors handling in EEPROM devices 13 2009
* 2010/0020,616 Soft Errors Handling in EEPROM Devices 3 2009
8,018,769 Non-volatile memory with linear estimation of initial programming voltage 5 2009
7,994,004 Flash memory cell arrays having dual control gates per memory cell charge storage element 2 2009
* 2010/0047,982 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 2 2009
8,301,826 Adaptive mode switching of flash memory address mapping based on host usage characteristics 3 2009
* 2010/0049,908 Adaptive Mode Switching of Flash Memory Address Mapping Based on Host Usage Characteristics 6 2009
8,284,606 Compensating for coupling during programming 4 2009
* 2010/0067,296 COMPENSATING FOR COUPLING DURING PROGRAMMING 2 2009
8,473,669 Method and system for concurrent background and foreground operations in a non-volatile memory array 4 2009
* 2011/0138,100 METHOD AND SYSTEM FOR CONCURRENT BACKGROUND AND FOREGROUND OPERATIONS IN A NON-VOLATILE MEMORY ARRAY 21 2009
8,102,705 Structure and method for shuffling data within non-volatile memory devices 27 2009
* 2010/0309,720 Structure and Method for Shuffling Data Within Non-Volatile Memory Devices 13 2009
8,194,470 Methods of forming flash device with shared word lines 3 2009
* 2010/0091,569 METHODS OF FORMING FLASH DEVICE WITH SHARED WORD LINES 1 2009
8,468,294 Non-volatile memory with multi-gear control using on-chip folding of data 3 2009
8,144,512 Data transfer flows for on-chip folding 28 2009
* 2011/0153,913 Non-Volatile Memory with Multi-Gear Control Using On-Chip Folding of Data 13 2009
7,965,562 Predictive programming in non-volatile memory 3 2009
* 2010/0097,857 Predictive Programming in Non-Volatile Memory 1 2009
7,978,533 NAND flash memory with a programming voltage held dynamically in a NAND chain channel region 1 2009
8,098,526 Reverse reading in non-volatile memory with compensation for coupling 0 2010
8,209,516 Method and system for dual mode access for storage devices 1 2010
8,179,723 Non-volatile memory with boost structures 2 2010
* 2010/0157,678 NON-VOLATILE MEMORY WITH BOOST STRUCTURES 4 2010
8,054,681 Read, verify word line reference voltage to track source level 0 2010
8,351,236 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture 14 2010
8,199,576 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a double-global-bit-line architecture 15 2010
* 2010/0259,962 Three-Dimensional Array of Re-Programmable Non-Volatile Memory Elements Having Vertical Bit Lines and a Single-Sided Word Line Architecture 71 2010
* 2010/0259,961 Three-Dimensional Array of Re-Programmable Non-Volatile Memory Elements Having Vertical Bit Lines and a Double-Global-Bit-Line Architecture 65 2010
8,023,322 Non-volatile memory and method with reduced neighboring field errors 1 2010
* 2010/0182,831 Non-Volatile Memory And Method With Reduced Neighboring Field Errors 2 2010
8,000,146 Applying different body bias to different substrate portions for non-volatile storage 1 2010
7,965,560 Non-volatile memory with power-saving multi-pass sensing 1 2010
7,984,233 Direct data file storage implementation techniques in flash memories 1 2010
* 2010/0217,926 Direct Data File Storage Implementation Techniques in Flash Memories 3 2010
8,214,583 Direct file data programming and deletion in flash memories 17 2010
* 2010/0223,423 Direct File Data Programming and Deletion in Flash Memories 19 2010
8,036,041 Method for non-volatile memory with background data latch caching during read operations 10 2010
7,902,031 Method for angular doping of source and drain regions for odd and even NAND blocks 0 2010
* 2010/0297,823 METHOD FOR ANGULAR DOPING OF SOURCE AND DRAIN REGIONS FOR ODD AND EVEN NAND BLOCKS 3 2010
8,452,911 Synchronized maintenance operations in a multi-bank storage system 1 2010
8,045,378 Nonvolatile memory with correlated multiple pass programming 1 2010
* 2011/0019,471 Nonvolatile Memory with Correlated Multiple Pass Programming 2 2010
8,873,303 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 0 2010
* 2011/0019,485 Non-Volatile Memory and Method with Shared Processing for an Aggregate of Read/Write Circuits 0 2010
8,914,703 Method for copying data in reprogrammable non-volatile memory 0 2010
* 2011/0072,332 Method for Copying Data in Reprogrammable Non-Volatile Memory 21 2010
8,050,095 Flash memory data correction and scrub techniques 6 2010
8,050,126 Non-volatile memory with improved sensing by reducing source line current 0 2010
* 2011/0075,480 Non-Volatile Memory With Improved Sensing By Reducing Source Line Current 2 2010
8,472,280 Alternate page by page programming scheme 15 2010
8,473,813 Methods of cell population distribution assisted read margining 0 2011
* 2011/0099,438 Methods of Cell Population Distribution Assisted Read Margining 7 2011
8,468,424 Method for decoding data in non-volatile storage using reliability metrics based on multiple reads 1 2011
8,163,622 Method for angular doping of source and drain regions for odd and even NAND blocks 1 2011
* 2011/0151,636 Method For Angular Doping Of Source And Drain Regions For Odd And Even NAND Blocks 2 2011
* 2011/0131,473 Method For Decoding Data In Non-Volatile Storage Using Reliability Metrics Based On Multiple Reads 17 2011
8,400,839 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells 5 2011
* 2011/0141,818 Nonvolatile Memory and Method for Compensating During Programming for Perturbing Charges of Neighboring Cells 2 2011
8,363,495 Non-volatile memory with redundancy data buffered in remote buffer circuits 0 2011
9,342,446 Non-volatile memory system allowing reverse eviction of data updates to non-volatile binary cache 0 2011
8,621,177 Non-volatile memory and method with phased program failure handling 0 2011
8,843,693 Non-volatile memory and method with improved data scrambling 0 2011
8,154,923 Non-volatile memory and method with power-saving read and program-verify operations 1 2011
8,547,720 Non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines 4 2011
8,526,237 Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereof 3 2011
8,159,876 Non-volatile memory and method for power-saving multi-pass sensing 1 2011
8,164,957 Reducing energy consumption when applying body bias to substrate having sets of nand strings 2 2011
8,334,180 Flash memory cell arrays having dual control gates per memory cell charge storage element 0 2011
8,300,457 Non-volatile memory and method with reduced neighboring field errors 0 2011
8,239,643 Non-volatile memory and method with control data management 0 2011
8,351,269 Method for non-volatile memory with background data latch caching during read operations 1 2011
8,300,458 Nonvolatile memory with correlated multiple pass programming 2 2011
8,300,473 Non-volatile memory with improved sensing by reducing source line current 0 2011
8,711,625 Bad column management with bit information in non-volatile memory systems 3 2011
8,824,183 Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereof 1 2011
8,625,322 Non-volatile memory having 3D array of read/write elements with low current structures and methods thereof 6 2011
8,762,627 Memory logical defragmentation during garbage collection 0 2011
8,228,729 Structure and method for shuffling data within non-volatile memory devices 1 2011
8,842,473 Techniques for accessing column selecting shift register with skipped entries in non-volatile memories 0 2012
8,542,529 Non-volatile memory and method with power-saving read and program-verify operations 0 2012
9,135,192 Memory system with command queue reordering 0 2012
8,687,421 Scrub techniques for use with dynamic read 2 2012
8,300,459 Non-volatile memory and method for power-saving multi-pass sensing 0 2012
8,681,548 Column redundancy circuitry for non-volatile memory 0 2012
8,725,935 Balanced performance for on-chip folding of non-volatile memories 0 2012
8,750,045 Experience count dependent program algorithm for flash memory 0 2012
9,224,475 Structures and methods for making NAND flash memory 0 2012
8,411,507 Compensating for coupling during programming 1 2012
8,472,255 Compensation of non-volatile memory chip non-idealities by program pulse adjustment 1 2012
9,153,595 Methods of making word lines and select lines in NAND flash memory 0 2012
9,076,506 Variable rate parallel to serial shift register 0 2012
8,897,080 Variable rate serial to parallel shift register 0 2012
9,129,854 Full metal gate replacement process for NAND flash memory 0 2012
* 9,218,881 Flash memory blocks with extended data retention 0 2012
* 2014/0115,230 Flash Memory with Data Retention Partition 0 2012
8,902,669 Flash memory with data retention bias 0 2012
8,823,075 Select gate formation for nanodot flat cell 2 2012
8,780,605 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture 0 2013
9,076,545 Dynamic adjustment of read voltage levels based on memory cell threshold voltage distribution 0 2013
9,099,532 Processes for NAND flash memory fabrication 0 2013
8,987,802 Method for using nanoparticles to make uniform discrete floating gate layer 1 2013
9,227,456 Memories with cylindrical read/write stacks 0 2013
9,331,181 Nanodot enhanced hybrid floating gate for non-volatile memory devices 0 2013
9,281,029 Non-volatile memory having 3D array architecture with bit line voltage control and methods thereof 0 2013
9,336,133 Method and system for managing program cycles including maintenance programming operations in a multi-layer memory 0 2013
9,223,693 Memory system having an unequal number of memory die on different control channels 0 2013
8,873,284 Method and system for program scheduling in a multi-layer memory 0 2013
9,147,439 Non-volatile memory having 3D array architecture with staircase word lines and vertical bit lines and methods thereof 0 2013
8,923,050 3D memory with vertical bit lines and staircase word lines and vertical switches and methods thereof 0 2013
8,895,437 Method for forming staircase word lines in a 3D non-volatile memory having vertical bit lines 1 2013
8,942,038 High endurance nonvolatile memory 0 2013
8,932,948 Memory cell floating gate replacement 0 2013
8,966,350 Providing reliability metrics for decoding data in non-volatile storage 0 2013
9,123,430 Differential current sense amplifier and method for non-volatile memory 0 2013
8,933,516 High capacity select switches for three-dimensional structures 2 2013
8,745,322 Management of non-volatile memory systems having large erase blocks 0 2013
8,969,153 NAND string containing self-aligned control gate sidewall cladding 3 2013
9,218,242 Write operations for defect management in nonvolatile memory 0 2013
9,063,671 Write operations with full sequence programming for defect management in nonvolatile memory 0 2013
9,177,663 Dynamic regulation of memory array source line 1 2013
8,824,191 Non-volatile memory having 3D array of read/write elements and read/write circuits and method thereof 3 2013
8,932,955 Triple patterning NAND flash memory with SOC 1 2013
9,245,629 Method for non-volatile memory having 3D array of read/write elements with efficient decoding of vertical bit lines and word lines 0 2013
9,043,537 Update block programming order 0 2013
9,218,283 Multi-die write management 0 2013
9,244,631 Lower page only host burst writes 0 2013
9,122,591 Pipelined data relocation and improved chip architectures 0 2013
8,817,514 Non-volatile memory having 3D array of read/write elements with low current structures and methods thereof 1 2014
9,190,134 Three-dimensional array of re-programmable non-volatile memory elements having vertical bit lines and a single-sided word line architecture 0 2014
9,368,224 Self-adjusting regulation current for memory array source line 0 2014
9,064,547 3D non-volatile memory having low-current cells and methods 0 2014
9,230,689 Finding read disturbs on non-volatile memories 0 2014
9,123,392 Non-volatile 3D memory with cell-selectable word line decoding 0 2014
8,902,652 Systems and methods for lower page writes 1 2014
8,886,877 In-situ block folding for nonvolatile memory 3 2014
8,972,675 Efficient post write read in three dimensional nonvolatile memory 0 2014
9,009,398 Write operations for defect management in nonvolatile memory 0 2014
9,177,808 Memory device with control gate oxygen diffusion control and method of making thereof 0 2014
8,964,467 Systems and methods for partial page programming of multi level cells 0 2014
9,182,928 Lower page only host burst writes 0 2014
9,104,556 Update block programming order 0 2014
9,153,324 Pattern breaking in multi-die write management 0 2014
9,245,898 NAND flash memory integrated circuits and processes with controlled gate height 0 2014
8,958,228 Non-volatile memory having 3D array of read/write elements with vertical bit lines and select devices and methods thereof 1 2014
9,337,085 Air gap formation between bit lines with side protection 0 2014
9,330,969 Air gap formation between bit lines with top protection 0 2014
9,224,637 Bi-level dry etching scheme for transistor contacts 0 2014
9,224,744 Wide and narrow patterning using common process 0 2014
9,201,788 In-situ block folding for nonvolatile memory 0 2014
9,355,713 Systems and methods for lower page writes 0 2014
9,349,479 Boundary word line operation in nonvolatile memory 0 2014
9,224,502 Techniques for detection and treating memory hole to local interconnect marginality defects 0 2015
9,230,971 NAND string containing self-aligned control gate sidewall cladding 0 2015
9,269,446 Methods to improve programming of slow cells 0 2015
 
INTEL CORPORATION (1)
* 6,549,457 Using multiple status bits per cell for handling power failures during write operations 30 2002
 
Semiconductor Energy Laboratory Co., Ltd. (1)
9,123,432 Semiconductor device and method for driving semiconductor device 0 2013
 
RENESAS ELECTRONICS CORPORATION (2)
* 6,064,597 Method of programming a multilevel nonvolatile memory cell with reduced number of erase operations 9 1997
* 6,137,732 Semiconductor memory device having voltage boosting circuit 9 1999
 
SANDISK CORPORATION (3)
7,307,881 Non-volatile semiconductor memory with large erase blocks storing cycle counts 6 2004
7,161,836 Method for programming non-volatile memory with self-adjusting maximum program loop 1 2005
* 2006/0203,558 Non-volatile semiconductor memory adapted to store a multi-valued data in a single memory cell 1 2006
 
SanDisk Technologies (1)
9,348,746 Method and system for managing block reclaim operations in a multi-layer memory 0 2013
 
KABUSHIKI KAISHA TOSHIBA (49)
6,414,893 Nonvolatile semiconductor memory device and method of using the same 23 1998
6,331,960 Nonvolatile semiconductor memory device and method for using the same 6 2000
* 6,522,580 Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states 711 2001
6,643,188 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 275 2002
6,807,095 Multi-state nonvolatile memory capable of reducing effects of coupling between storage elements 200 2002
6,944,063 Non-volatile semiconductor memory with large erase blocks storing cycle counts 47 2003
* 6,856,544 Semiconductor memory device in which source line potential is controlled in accordance with data programming mode 4 2003
* 2003/0128,587 Semiconductor memory device in which source line potential is controlled in accordance with data programming mode 0 2003
6,894,931 Nonvolatile semiconductor memory device 66 2003
6,990,019 Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell 11 2003
* 7,301,806 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell 7 2004
* 2005/0024,944 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell 1 2004
7,057,936 Nonvolatile semiconductor memory device 87 2004
7,061,798 Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states 33 2004
* 7,245,528 Semiconductor memory device which stores plural data in a cell 46 2004
* 2005/0169,057 Semiconductor memory device which stores plural data in a cell 70 2004
7,085,161 Non-volatile semiconductor memory with large erase blocks storing cycle counts 10 2004
7,057,930 Semiconductor memory device in which source line potential is controlled in accordance with data programming mode 1 2004
* 2005/0094,441 Semiconductor memory device in which source line potential is controlled in accordance with data programming mode 0 2004
7,088,616 Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell 8 2005
* 2005/0135,154 Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell 1 2005
7,224,613 Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states 84 2005
7,365,018 Fabrication of semiconductor device for flash memory with increased select gate width 6 2005
* 2007/0148,973 Fabrication of semiconductor device for flash memory with increased select gate width 2 2005
7,224,615 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell 6 2006
7,286,404 Non-volatile semiconductor memory adapted to store a multi-valued data in a single memory cell 6 2006
7,394,692 Non-volatile semiconductor memory with large erase blocks storing cycle counts 4 2006
7,596,020 Multi-level nonvolatile semiconductor memory device capable of discretely controlling a charge storage layer potential based upon accumulated electrons 0 2006
* 2007/0035,996 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME 3 2006
7,529,131 Nonvolatile semiconductor memory, method for reading out thereof, and memory card 4 2006
* 2007/0133,288 NONVOLATILE SEMICONDUCTOR MEMORY, METHOD FOR READING OUT THEREOF, AND MEMORY CARD 7 2006
* 7,376,009 Semiconductor memory device which stores plural data in a cell 18 2007
7,405,970 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 8 2007
* 2008/0043,530 NON-VOLATILE SEMICONDUCTOR MEMORY ADAPTED TO STORE A MULTI-VALUED DATA IN A SINGLE MEMORY CELL 1 2007
7,468,908 Non-volatile semiconductor memory device adapted to store a multi-valued in a single memory cell 5 2007
7,738,302 Semiconductor memory device with stores plural data in a cell 10 2008
7,672,168 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 5 2008
7,864,591 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 5 2010
* 2010/0118,607 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE ADAPTED TO STORE A MULTI-VALUED DATA IN A SINGLE MEMORY CELL 1 2010
8,154,930 Semiconductor memory device which stores plural data in a cell 3 2010
8,208,311 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 1 2010
* 2011/0090,741 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE ADAPTED TO STORE A MULTI-VALUED DATA IN A SINGLE MEMORY CELL 1 2010
8,385,130 Semiconductor memory device which stores plural data in a cell 0 2012
8,953,371 Semiconductor storage device 0 2012
8,605,511 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 4 2012
8,542,538 Semiconductor memory device which stores plural data in a cell 0 2013
9,142,299 Semiconductor memory device which stores plural data in a cell 0 2013
8,929,135 Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell 0 2013
9,257,189 Non-volatile semiconductor memory adapted to store a multi-valued data in a single memory cell 0 2014
 
WINBOND ELECTRONICS CORP. (1)
* 8,659,950 Semiconductor memory device 0 2013
 
SANDISK TECHNOLOGIES INC. (3)
6,983,428 Highly compact non-volatile memory and method thereof 77 2002
* 2004/0060,031 Highly compact non-volatile memory and method thereof 18 2002
8,225,242 Highly compact non-volatile memory and method thereof 0 2008
 
SANDISK IL LTD. (18)
8,059,456 Programming a NAND flash memory with reduced program disturb 4 2007
* 2008/0259,684 Programming a NAND flash memory with reduced program disturb 14 2007
7,679,965 Flash memory with improved programming precision 2 2007
7,660,166 Method of improving programming precision in flash memory 2 2007
* 2008/0181,000 Method Of Improving Programming Precision In Flash Memory 37 2007
* 2008/0180,996 Flash Memory With Improved Programming Precision 7 2007
8,073,648 Measuring threshold voltage distribution in memory using an aggregate characteristic 6 2007
7,613,045 Operation sequence and commands for measuring threshold voltage distribution in memory 28 2007
* 2009/0135,646 OPERATION SEQUENCE AND COMMANDS FOR MEASURING THRESHOLD VOLTAGE DISTRIBUTION IN MEMORY 7 2007
* 2008/0285,351 MEASURING THRESHOLD VOLTAGE DISTRIBUTION IN MEMORY USING AN AGGREGATE CHARACTERISTIC 137 2007
7,808,819 Method for adaptive setting of state voltage levels in non-volatile memory 13 2008
7,808,836 Non-volatile memory with adaptive setting of state voltage levels 4 2008
7,952,928 Increasing read throughput in non-volatile memory 0 2008
* 2009/0296,487 INCREASING READ THROUGHPUT IN NON-VOLATILE MEMORY 0 2008
7,848,144 Reverse order page writing in flash memories 4 2008
* 2009/0310,413 REVERSE ORDER PAGE WRITING IN FLASH MEMORIES 4 2008
8,009,472 Method for adaptive setting of state voltage levels in non-volatile memory 5 2010
8,339,855 Reverse order page writing in flash memories 0 2010
* Cited By Examiner