Method of encapsulating a semiconductor package

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United States of America Patent

PATENT NO 5776796
SERIAL NO

08726697

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Abstract

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A method of encapsulating a semiconductor device. The encapsulation method includes a semiconductor chip package assembly having a spacer layer between a top surface of a sheet-like substrate and a contact bearing surface of a semiconductor chip, wherein the substrate has conductive leads thereon, the leads being electrically connected to terminals on a first end and bonded to respective chip contacts on a second end. Typically, the spacer layer is comprised of a compliant or elastomeric material. A protective layer is attached on a bottom surface of the substrate so as to cover the terminals on the substrate. A flowable, curable encapsulant material is deposited around a periphery of the semiconductor chip after the attachment of the protective layer so as to encapsulate the leads. The encapsulant material is then cured. Typically, this encapsulation method is performed on a plurality of chip assemblies simultaneously.

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Patent Owner(s)

Patent OwnerAddress
TESSERA INC A CORP OF DELAWARE3099 ORCHARD DRIVE SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Distefano, Thomas H Monte Sereno, CA 191 14662
Fjelstad, Joseph Sunnyvale, CA 130 7144
Karavakis, Konstantine Cupertino, CA 73 2085
Mitchell, Craig S Santa Clara, CA 38 2127
Smith, John W Palo Alto, CA 213 9165

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