Power-up detector for low power systems
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United States of America Patent
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Jul 14, 1998
Grant Date -
N/A
app pub date -
Jul 26, 1996
filing date -
Jul 26, 1996
priority date (Note) -
Expired
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Abstract
A power-up reset detector circuit is described which uses the threshold voltages of NMOS and PMOS transistors to detect the power-up of integrated circuits, and uses a current mirror to track power supply and process variations.
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