Semiconductor device realizing internal operation factor corresponding to an external operational factor stably regardless of fluctuation of the external operational factor
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United States of America Patent
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Jul 21, 1998
Grant Date -
N/A
app pub date -
Jan 31, 1996
filing date -
Feb 6, 1995
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Abstract
A semiconductor memory device includes a difference adjusting circuit for detecting difference in at least one of phase and frequency between an external clock signal and an internal clock signal, for outputting a control potential for reducing the difference, and a current control circuit for adjusting driving current of an internal clock signal generating circuit in accordance with an output potential from the difference adjusting circuit. The current control circuit includes a current change restricting circuit for making smaller an amount of change of current in the clock signal generating circuit with respect to the change in the output potential from the difference adjusting circuit. An internal power supply voltage obtained by lowering internally the external power supply voltage is applied to the clock signal generating circuit. Further, when supply of the external clock signal is stopped, the output potential from the difference adjusting circuit is held. The internal power supply potential generating circuit further includes a current control circuit for adjusting an amount of current for supplying the internal power supply potential in accordance with the difference between an internal power supply potential and a prescribed potential level.
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Patent Owner(s)
- RENESAS ELECTRONICS CORPORATION
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Ooishi, Tsukasa | Hyogo, JP | 317 | 7685 |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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