One-chip microcomputer capable of executing correction program and microcomputer capable of correcting ROM
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United States of America Patent
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-
Jul 21, 1998
Grant Date -
N/A
app pub date -
Nov 30, 1995
filing date -
Dec 13, 1994
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An instruction for returning to a ROM is written to a position where data is not broken even if a next correction is executed in order not to the content of a register even if an interruption processing for correction and a processing for returning a ROM program are executed. A microcomputer connected through a serial i/O bus, an EEROM, and a correction data writing device comprises a CPU, a RAM, a ROM, a PC comparison register section, a ROM correction processing circuit having a PC value latch section, and a serial i/O section. The CPU sequentially executes an internal sequence control of the microcomputer and a logical operation in accordance with instructions written in the ROM as a program in advance. The RAM temporarily saves intermediate processing data of, e.g. calculation, or saves an adjustment value transferred from the EEPROM when the program is actually executed.
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