Multi-layer electrical interconnection methods and field emission display fabrication methods

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5786232
SERIAL NO

08778311

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Abstract

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A flat-panel field emission display comprises a luminescent faceplate, a rigid backplate, and an interposed or sandwiched emitter or cathode plate. A dielectric connector ridge is screen-printed over the faceplate's rear surface. Upper and lower level conductors are then screen printed over the faceplate. The lower-level conductors are applied directly on the faceplate rear surface. The upper-level conductors are applied atop the connector ridge. A plurality of bond wire interconnections extend between individual screen-printed conductors of the upper and lower levels. The bond wire interconnections create inter-level electrical interconnections between said individual screen-printed conductors. The cathode plate is positioned over the connector ridge. The cathode plate has a plurality of die bond pads facing the faceplate rear surface and aligned with the upper-level conductors. A plurality of conductive bonds such as flip-chip connections are positioned between the die bond pads and the facing upper-level conductors.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INC8000 SOUTH FEDERAL WAY BOISE ID 83716-9632

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Stansbury, Darryl M Boise, ID 18 198

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