Serializing-parallelizing circuit for high speed digital signals
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United States of America Patent
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Aug 4, 1998
Grant Date -
N/A
app pub date -
Sep 26, 1996
filing date -
Nov 13, 1995
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The serializing-parallelizing circuit comprises, on a single integrated circuit chip (IC), a transmitter (TX) which performs the parallel-to-series conversion of the data stream, the insertion into the serial stream, with a pre-set periodicity, of a synchronism word, and the line coding of the serial stream, and a receiver (RX) in which clock signals synchronous with the data stream are extracted from a serial stream of coded data and in which the data are decoded and the decoded signals undergo series-to-parallel conversion. The transmitter (TX) and the receiver (RX) can be configured to operate with 4 or 8-bit parallelism.
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