Power surge supression system with multi-level status annunciation circuitry
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United States of America Patent
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Aug 4, 1998
Grant Date -
N/A
app pub date -
Jul 30, 1996
filing date -
Jul 30, 1996
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A surge suppression system includes a surge suppression circuit having multiple surge suppression elements each capable of activating during a voltage transient or other power surge condition. A multi-level monitoring circuit surveys the percentage of operational surge suppression elements. The monitoring circuit generates a low priority signal when a small percentage of the surge suppression elements are disabled. The monitoring circuit generates a high priority signal when a second higher percentage of the surge suppressor elements are disabled. In another aspect of the invention, each fuse is formed as a trace on a printed circuit board.
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