ASIC chip for implementing a scaleable multicast ATM switch
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United States of America Patent
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Aug 4, 1998
Grant Date -
N/A
app pub date -
Jan 29, 1996
filing date -
Jan 26, 1995
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An application specific integrated circuit (or 'ASIC') chip for building a scaleable, multicast, asynchronous transfer mode (or 'ATM') switch having on the order of 100 to a few thousand input and output ports. The ATM switch has a regular structure and may be easily expanded. Furthermore, the ATM switch permits synchronization for data and clock signals to be relaxed. Moreover, the switch system may be built using economic CMOS technology. The switch fabric of the ASIC chip can handle high line rates, supports multicasing functionality, and permits output groups to be flexibly altered. The ASIC chips may be arranged in an array thereby permitted the switch size to be scaled.
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