Successive approximation analog-to-digital converter using balanced charge integrating amplifiers
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United States of America Patent
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Aug 11, 1998
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app pub date -
Nov 7, 1996
filing date -
Nov 7, 1995
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Abstract
An analog-to-digital converter for on-chip focal-plane image sensor applications. The analog-to-digital converter utilizes charge integrating amplifiers in a charge balancing architecture to implement successive approximation analog-to-digital conversion. This design requires minimal chip area and has high speed and low power dissipation for operation in the 2-10 bit range. The invention is particularly well suited to CMOS on-chip applications requiring many analog-to-digital converters, such as column-parallel focal-plane architectures.
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