Method for forming high dielectric capacitor electrode structure and semiconductor memory devices
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United States of America Patent
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Aug 11, 1998
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N/A
app pub date -
Oct 20, 1995
filing date -
May 16, 1994
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Abstract
A capacitor and electrode structure comprising a PZT ferroelectric layer 17 with a primary component (Pb) and secondary component (Ti), a lower electrode layer 16 formed on the underside of the ferroelectric layer and made up of a special element (Pt) and Ti, and compounds thereof, and a diffusion barrier layer 18 which is formed on the underside of the lower electrode layer and which functions as a diffusion barrier with respect to Pb. The capacitor and the electrode structure, which may be a component of a semiconductor memory device, suppress fluctuations in the composition of the ferroelectric layer in PZT, etc., so as to maintain the intended performance of the PZT ferroelectric layer, thereby simplifying and stabilizing film fabrication, and preventing the degradation of electrical characteristics and adverse effects on lower layers.
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