Multiply accumulate computation unit
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United States of America Patent
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-
Aug 18, 1998
Grant Date -
N/A
app pub date -
Aug 27, 1996
filing date -
Aug 27, 1996
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A multiply/accumulate computation circuit is provided. The circuit will perform the multiplication of a first binary number that is a multiplicand and a second binary number that is a multiplier to produce a product. The product can be added or subtracted from a previous result. The product may be negated. The product may be multiplied by a factor of two. Or the product that is multiplied by the factor of two may be added or subtracted from the previous result. The multiplication is accomplished in a modified Radix 4 Booth's encoding and translation circuit to produce a set of partial products that are combined in a n operand adder to form a final result.
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