Architecture for an expandable transaction-based switching bus
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United States of America Patent
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Aug 18, 1998
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app pub date -
Mar 28, 1996
filing date -
Mar 28, 1996
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Abstract
A switching bus architecture enables efficient transfer of data within a network switch having a plurality of ports interconnected by a high-performance switching bus. The architecture is preferably implemented as novel port interface and forwarding engine circuitry that cooperate to efficiently transmit data to, and receive data from, the switching bus in accordance with a 2-tier arbitration policy that ensures adequate port access to the bus. As a result of such a cooperating arrangement, the architecture improves the transfer efficiency of the switch by providing all ports sufficient bus access to convey accurate data throughout the switch.
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