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Abstract

An imporved integrated circuit semiconductor static write and read and erase memory cell for storing in both one and more than one bit of binary data, having a switching transistor (M20) for switching on the memory cell, a data write bit line (26) for writing data into the cell using a column write and read and erase sense circuit (46), a data read bit line (28) for reading data stored in the memory cell, data erase bit line (32) for erasing data stored in the memory cell, a magnetic or electromagnetic element (36) for storing data in form of electromagnetism, a data reading element (34) for reading the data stored as magnetism or electromagnetism, an output current and output voltage bit line (35) for providing an output connection to a column write and read and erase sense circuit (46).

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First Claim