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Abstract

A signal processor which includes a first data processing unit for processing data supplied thereto by a data bus system which operates in successive command cycles, and at least one further data processing unit operating in parallel with the first processing unit to process data supplied from the first processing unit during the command cycles. Since the further processing unit does not receive data from the bus system, that processor and still further processors can be added without requiring extension of the bus system. The parallel operation of a plurality of processing units achieves enhanced speed of computation, so that the signal processor is particularly adapted to computation of auto-correlation and cross-correlation functions and for FIR digital filtering.

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First Claim