Method of packaging integrated circuits

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United States of America Patent

PATENT NO 5801072
SERIAL NO

08615388

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method of assembling flip chips in a package. Solder bumps are attached to a first flip chip and to a second flip chip. A package substrate having first and second opposing sides is provided, and the first flip chip is electrically connected to the first side of the package substrate using the solder bumps attached to the first flip chip. The second flip chip is also electrically connected to the second side of the package substrate using the solder bumps attached to the second flip chip. The position of the second flip chip is substantially opposed to and aligned with the position of the first flip chip. The first and second flip chips are under filled with a heat conductive epoxy. The first flip chip is encapsulated against the first side of the package substrate, and the second flip chip is encapsulated against the second side of the package substrate. Solder balls are attached to the first side of the package insert. By attaching the flip chips to opposite sides of the package substrate, balancing the structure of the overall package, bending stress is reduced due to the flip chips having similar thermal coefficients of expansion. Additional benefits include improved electrical performance, reduced weight, and reduced size of the packaged circuit.

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Patent Owner(s)

Patent OwnerAddress
BELL SEMICONDUCTOR LLC401 N MICHIGAN AVE SUITE 1600 CHICAGO IL 60611

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barber, Ivor G San Jose, CA 13 407

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