Three-dimensional warp-resistant integrated circuit module method and apparatus
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United States of America Patent
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Sep 1, 1998
Issued Date -
N/A
app pub date -
Aug 11, 1995
filing date -
Mar 29, 1993
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Abstract
A method and apparatus for achieving a three-dimensional high density warp-resistant integrated circuit module is provided. Selected individual integrated circuit packages which comprise the module are mounted with a thin stiffener, or a thin layer of material having a coefficient of thermal expansion (CTE) less than or equal to that of silicon, and/or are lapped to reduce the package profile, and/or are mounted with a thin layer of material having a CTE greater than that of silicon, and preferably approximately equal to that of the casing material.
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