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Abstract

A data processing system dynamically balances allocation of storage areas in a shared coupling facility that is devoted to storage of directory entries and data blocks. Each directory entry includes information regarding the validity of a data block that is locally stored by one or more processor modules in the data processing system. The system includes a coupling facility having a cache memory wherein a first portion is allocated to storage of data blocks and a second portion is allocated to storage of directory entries. Each directory entry, associated with a data block, indicates the validity or invalidity of data contained in a copy of the data block maintained by a connected computer module in its local memory. Each computer module, upon requiring a first data block and determining that (i) the first data block is present in its local memory (i.e., a buffer 'hit'), but (ii) is not marked valid and (iii) is not present in the coupling facility (i.e., a cache 'miss'), accesses the first data block from a disk store, even though the first data block in its local memory may be valid. A memory allocation procedure controls the sizes of the first portion and second portion of the cache memory. The procedure (i) maintains a record, per unit of time, of a number of cache 'miss' occurrences, (i.e., a cache 'miss' rate) and an estimate of the number of false invalidation occurrences (i.e., a false invalidation rate); derives a first order derivative of the sum of cache miss-rate and the estimated false invalidation rate and (iii) employs the derivative to adjust the sizes of the first portion and second portion of the cache memory so as to minimize the sum of the expected miss and false invalidation rate values.

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First Claim