Importance

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Abstract

A conventional SIMD processor array architecture's functions are amplified by a SIMIMD architecture where more programmable flexibility would be useful. Decision making in general and specifically classification where decision trees are common, is a problem eased by SIMIMD. A SIMD array processor having a plurality of pickets in SIMIMD mode allows each picket to occasionally execute data-dependent instructions that are different from the instructions in other pickets to greatly improve execution efficiency in decision making areas. Every element in A SIMD array of processors receives a stream of commands from the array controller. Here several mechanisms allow an array machine with individual processing elements, called pickets, to interpret some of the SIMD commands in their own unique way, giving each picket a degree of local autonomy. A resulting capability allows the pickets to execute instructions in a mode called SIMIMD. Another resulting capability boosts the performance of executing floating-point instructions significantly. Yet another capability provides for GROUPING of pickets in various useful ways such that a combination of groups can be executing SIMD instructions while others are DOZING. There are other resulting capabilities. The SIMD machine is used alone or as part of multiprocessor parallel array processor computing systems and for parallel array processing with a simplified architecture adaptable to chip implementation in an air-cooled environment. The array provided is an N dimensional array of byte-wide processing units each coupled with an adequate segment of byte-wide memory and control logic. A partitionable section of the array containing several processing units are contained on a silicon chip arranged with 'pickets', elements of the processing array, each preferably consisting of combined processing element with a local memory for processing bit parallel bytes of information in a clock cycle.

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First Claim