Memory system which enables storage and retrieval of more than two states in a memory cell

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United States of America Patent

PATENT NO 5808932
SERIAL NO

08779991

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A memory circuit which enables storage of more than two logic states in a memory cell. Since the additional logic states may be used to represent additional information bits, this memory circuit increases the number of bits that may be stored per memory cell, thereby increasing the storage density and reducing the cost per bit. The disclosed memory circuit comprises an analog-to-digital converter coupled to detect a current through a transistor in a memory cell. The current is determined by a charge stored on the transistor's gate. By enabling the current to be detected in discrete increments, it becomes possible to represent more than one bit of information with the charge stored in the memory cell. Usage of additional increments necessitates more precise storage and detection circuitry. In one embodiment, the storage circuitry uses feedback to obtain a greater logic state retrieval accuracy.

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Patent Owner(s)

Patent OwnerAddress
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE LTDSINGAPORE 768923

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Irrinki, V Swamy Milpitas, CA 20 1244
Kapoor, Ashok Palo Alto, CA 18 493
Leung, Raymond T Palo Alto, CA 6 223
Owens, Alex Los Gatos, CA 7 330
Wik, Thomas R Livermore, CA 18 585

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