Synchronous burst extended data out dram
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United States of America Patent
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Sep 22, 1998
Issued Date -
N/A
app pub date -
Mar 5, 1997
filing date -
Dec 23, 1994
priority date (Note) -
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Abstract
An integrated circuit memory device is described which can operate at high data speeds. The memory device can either store or retrieve data from the memory in a burst access operation. The burst operations latches a memory address from external address lines and internally generates additional memory addresses. A clock signal is provided to synchronize the burst operations. The clock signal is independent of an address latch signal used to latch an external address.
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