Thin films of ABO.sub.3 with excess B-site modifiers and method of fabricating integrated circuits with same

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United States of America Patent

PATENT NO 5814849
SERIAL NO

08788229

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Abstract

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A method for fabricating an integrated circuit capacitor having a dielectric layer comprising BST with excess B-site material, such as titanium, added. A polyoxyalkylated metal liquid precursor solution is prepared comprising a stock solution of BST of greater then 99.999% purity blended with excess B-site material such as titanium such that the titanium is in the range of 0-100 mol %. A xylene exchange is then performed to adjust the viscosity of the solution for spin-on application to a substrate. The precursor is spun on a first electrode, dried at 400.degree. C. for 2 minutes, then annealed at 650.degree. C. to 800.degree. C. for about an hour to form a layer of BST with excess titanium. A second electrode is deposited, patterned, and annealed at between 650.degree. C. to 800.degree. C. for about 30 minutes. The resultant capacitor exhibits an enlarged dielectric constant with only a small increase in leakage current.

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Patent Owner(s)

  • MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;SYMETRIX CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Azuma, Masamichi Colorado Springs, CO 45 781
Paz, De Araujo Carlos A Colorado Springs, CO 178 6216
Scott, Michael C Colorado Springs, CO 49 1349

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