Multiple writes per a single erase for a nonvolatile memory
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United States of America Patent
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Sep 29, 1998
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N/A
app pub date -
Sep 29, 1995
filing date -
Sep 29, 1995
priority date (Note) -
Expired
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Abstract
A method for performing multiple writes before an erase to a nonvolatile memory cell is described. A first bit is stored at a first level of a nonvolatile memory cell. A second bit is stored at a second level of the nonvolatile memory cell. A method of erasing a nonvolatile memory cell is described. A level indicator that indicates the next level of the nonvolatile memory cell to write to is incremented. A method of reading a nonvolatile memory cell includes recalling a level indicator. The nonvolatile memory cell is then sensed at a level indicated by the level indicator to determine the state of the memory cell.
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