Multi-level nonvolatile semiconductor memory device having improved programming level and read/write multi-level data circuits
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United States of America Patent
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Sep 29, 1998
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N/A
app pub date -
Nov 13, 1996
filing date -
Nov 14, 1995
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Abstract
A nonvolatile semiconductor memory device includes a memory cell including a charge storage section for storing n-value data (n.gtoreq.3). In this device, the charge storage section has discrete first to n-th charge amount regions for storing the n-value data. If the first to n-th charge amount regions are defined as n-th, (n-1)-th, . . . , (i+1)-th, i-th charge amount regions descending order of an amount of positive or negative charge stored in the charge storage section, a charge amount difference .DELTA.Mj between a j-th charge amount region and a (j-1)-th charge amount region is set to .DELTA.Mn >.DELTA.Mn-1> . . . >.DELTA.Mi+2>.DELTA.Mi+1.
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