Semiconductor memory device and memory module using the same
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United States of America Patent
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Oct 6, 1998
Issued Date -
N/A
app pub date -
Feb 25, 1997
filing date -
Jan 27, 1995
priority date (Note) -
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Abstract
Input/output terminals of a first semiconductor memory device in which failures or defects exist in units of memory mats and input/output terminals of a second semiconductor memory device having redundant memory mats are connected to one another on a mounted substrate to thereby relieve the failures in the memory mat units. A power source is substantially cut off from supplying to a faulty memory mat.
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