FPGA two turn routing structure with lane changing and minimum diffusion area

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United States of America Patent

PATENT NO 5828230
SERIAL NO

08775425

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Abstract

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A two-turn programmable routing structure is provided for a programmable logic device that provides a high degree of routing flexibility, with lane-changing capability, while requiring a relatively small diffusion surface area. One routing structure according to the invention provides lane-changing capability for every interconnect line in the structure and a fast path for each interconnect line running straight through the structure. The routing structure preferably comprises a unitary elongated diffusion area separated by voltage-controlled transistor gates into serially arrayed adjacent diffusion regions. The sequential diffusion regions are connected to interconnect lines having assigned directions, and can be grouped into sets of N directions, where N is a multiple of eight. The directions associated with the set of diffusion regions follow specified rules that impart the diffusion-sharing, lane-changing, and fast-path capabilities of the routing structure of the invention.

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Patent Owner(s)

  • XILINX, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Young, Steven P San Jose, CA 216 7858

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