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Abstract

A transmission processor (16) receives an input packetized datastream (FIGS. 6-9; FIGS. 15-18 signal A) containing packets of data bytes including MPEG coded video information. The transmission processor outputs a symbol datastream (FIGS. 15-18 signal F) representing a sequence of data fields (FIG. 1) comprising groups of data segments (X) with an associated field sync segment. The transmission processor inserts overhead information. e.g., FEC error coding information, into each data segment, and inserts the longer duration field sync overhead segment between groups of data field segments. The frequency of the transmission processor input byte clock (SC/2, FIG. 6; FIG. 15) an integer sub-multiple of an output symbol clock (SC) frequency. The input datastream exhibits constant uniform inter-packet data gaps and a constant uniform data rate, thereby facilitating the seamless insertion of the field sync overhead segment into the datastream without interrupting the datastream. Similar but inverse processing occurs at a receiver.

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First Claim