Bear chip mounting printed circuit board and a method of manufacturing thereof by photoetching

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5831833
SERIAL NO

08680822

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Disclosed is a method of manufacturing bare chip mounting multi-layer printed circuit board in which arbitrary numbers of wiring circuit conductor layers and insulating layers are alternately stacked on one or both surfaces of a printed circuit board as a substrate, and a recessed portion with an upper opening capable of mounting and resin-encapsulating a bare chip part is formed on the surface of the printed circuit board, wherein at least the uppermost one of the insulating layers is made from a photosensitive resin, and the bare chip part mounting recessed portion is formed by photoetching the insulating layer made from the photosensitive resin. Since the bare chip part mounting recessed portion is formed by photoetching, the recessed portion can be easily and reliably formed. This results in a high product accuracy and allows a packaged part to be freely, additionally mounted even on the recessed portion.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
NEC CORPORATIONTOKYO 108-8001

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shirakawa, Hirotsugu Tokyo, JP 7 272
Tanaka, Yasunori Tokyo, JP 95 1235

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation