US Patent No: 5,834,830

Number of patents in Portfolio can not be more than 2000

LOC (lead on chip) package and fabricating method thereof

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Importance

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Abstract

An LOC semiconductor package includes: a semiconductor chip; a plurality of two-sided tapes being attached on predetermined portions of the semiconductor chip inthe form of layers; a lead frame having a step coverage corresponding to the form of the two-sided tape; wires electrically connecting inner leads of the lead frame to pads of the semiconductor chip; and a coating fluid for covering the semiconductor chip, the lead frame and the wires. Its fabricating method includes the steps of: forming an LOC lead frame having dam bars for a chip size package; attaching a plurality of two-sided tapes on the dam bars of the lead frame in the form of layers; attaching a semiconductor chip onto an uppermost layer of said plurality of two-sided tapes; wire-bonding a pad of the semiconductor chip to respective inner leads of the lead frame by using a conductive means; and potting to inject a coating fluid into the lead frame. By employing the LOC package and its fabricating method, the fabricating process can be simplified and its production cost can be reduced.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
LG SEMICON CO., LTD.CHUNGCHEONGBUK-DO791

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cho, Jae Weon Choongchungbook-Do, KR 4 178

Cited Art

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (1)
5,585,600 Encapsulated semiconductor chip module and method of forming the same 38 1993
 
RENESAS ELECTRONICS CORPORATION (1)
5,583,375 Semiconductor device with lead structure within the planar area of the device 43 1992

Patent Citation Ranking

Forward Cites

Patent Info (Count) # Cites Year
 
AMKOR TECHNOLOGY, INC. (117)
7,102,208 Leadframe and semiconductor package with improved solder joint strength 2 2000
6,639,308 Near chip size semiconductor package 9 2000
6,798,047 Pre-molded leadframe 5 2002
6,777,789 Mounting for a package containing a chip 6 2003
6,965,159 Reinforced lead-frame assembly for interconnecting circuits within a circuit module 4 2003
6,750,545 Semiconductor package capable of die stacking 13 2003
6,927,483 Semiconductor package exhibiting efficient lead placement 24 2003
6,794,740 Leadframe package for semiconductor devices 4 2003
7,095,103 Leadframe based memory card 0 2003
6,879,034 Semiconductor package including low temperature co-fired ceramic substrate 4 2003
7,045,396 Stackable semiconductor package and method for manufacturing same 77 2003
7,008,825 Leadframe strip having enhanced testability 24 2003
6,876,068 Semiconductor package with increased number of input and output pins 44 2003
7,183,630 Lead frame with plated end leads 7 2003
6,897,550 Fully-molded leadframe stand-off feature 3 2003
7,485,952 Drop resistant bumpers for fully molded memory cards 0 2003
6,873,041 Power semiconductor package with strap 16 2003
7,071,541 Plastic integrated circuit package and method and leadframe for making the package 1 2003
7,245,007 Exposed lead interposer leadframe package 44 2003
7,057,280 Leadframe having lead locks to secure leads to encapsulant 4 2003
6,921,967 Reinforced die pad support structure 4 2003
6,998,702 Front edge chamfer feature for fully-molded memory cards 7 2003
6,846,704 Semiconductor package and method for manufacturing the same 10 2003
6,967,395 Mounting for a package containing a chip 12 2003
6,893,900 Method of making an integrated circuit package 1 2003
7,138,707 Semiconductor package including leads and conductive posts for providing increased functionality 5 2003
7,211,879 Semiconductor package with chamfered corners and method of manufacturing the same 4 2003
6,965,157 Semiconductor package with exposed die pad and body-locking leadframe 9 2003
7,115,445 Semiconductor package having reduced thickness 1 2004
7,057,268 Cavity case with clip/plug for use on multi-media card 3 2004
7,091,594 Leadframe type semiconductor package having reduced inductance and its manufacturing method 7 2004
7,170,150 Lead frame for semiconductor package 2 2004
6,844,615 Leadframe package for semiconductor devices 7 2004
7,005,326 Method of making an integrated circuit package 5 2004
7,190,062 Embedded leadframe semiconductor package 24 2004
7,067,908 Semiconductor package having improved adhesiveness and ground bonding 4 2004
7,211,471 Exposed lead QFP package fabricated through the use of a partial saw process 43 2004
7,598,598 Offset etched corner leads for semiconductor package 0 2004
7,202,554 Semiconductor package and its manufacturing method 14 2004
7,045,882 Semiconductor package including flip chip 7 2004
6,953,988 Semiconductor package 18 2004
7,217,991 Fan-in leadframe semiconductor package 8 2004
7,253,503 Integrated circuit device packages and substrates for making the packages 41 2004
7,001,799 Method of making a leadframe for semiconductor devices 2 2004
7,064,009 Thermally enhanced chip scale lead on chip semiconductor package and method of making same 7 2004
7,030,474 Plastic integrated circuit package and method and leadframe for making the package 2 2004
7,176,062 Lead-frame method and assembly for interconnecting circuits within a circuit module 0 2005
7,214,326 Increased capacity leadframe and semiconductor package using the same 4 2005
7,247,523 Two-sided wafer escape package 15 2005
6,995,459 Semiconductor package with increased number of input and output pins 49 2005
7,192,807 Wafer level package and fabrication method 17 2005
7,045,883 Thermally enhanced chip scale lead on chip semiconductor package and method of making same 5 2005
7,507,603 Etch singulated semiconductor package 8 2005
7,361,533 Stacked embedded leadframe 20 2005
7,572,681 Embedded electronic component package 19 2005
7,112,474 Method of making an integrated circuit package 1 2005
7,564,122 Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant 1 2006
8,410,585 Leadframe and semiconductor package made using the leadframe 0 2006
7,535,085 Semiconductor package having improved adhesiveness and ground bonding 2 2006
7,902,660 Substrate for semiconductor device and manufacturing method thereof 15 2006
7,968,998 Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package 2 2006
7,321,162 Semiconductor package having reduced thickness 0 2006
7,332,375 Method of making an integrated circuit package 0 2006
7,521,294 Lead frame for semiconductor package 5 2006
7,714,431 Electronic component package comprising fan-out and fan-in traces 20 2006
7,687,893 Semiconductor package having leadframe with exposed anchor pads 3 2006
7,829,990 Stackable semiconductor package including laminate interposer 1 2007
7,982,297 Stackable semiconductor package having partially exposed semiconductor die and method of fabricating the same 1 2007
7,420,272 Two-sided wafer escape package 16 2007
7,723,210 Direct-write wafer level chip scale package 6 2007
7,977,774 Fusion quad flat semiconductor package 3 2007
7,687,899 Dual laminate package structure with embedded elements 6 2007
7,777,351 Thin stacked interposer package 24 2007
8,089,159 Semiconductor package with increased I/O density and method of making the same 0 2007
7,847,386 Reduced size stacked semiconductor package and method of making the same 0 2007
7,560,804 Integrated circuit package and method of making the same 1 2008
7,956,453 Semiconductor package with patterning layer and method of making same 1 2008
7,723,852 Stacked semiconductor package and method of making same 4 2008
8,067,821 Flat semiconductor package with half package molding 2 2008
7,768,135 Semiconductor package with fast power-up cycle and method of making same 3 2008
7,808,084 Semiconductor package with half-etched locking features 1 2008
8,125,064 Increased I/O semiconductor package and method of making same 0 2008
8,184,453 Increased capacity semiconductor package 1 2008
7,692,286 Two-sided fan-out wafer escape package 20 2008
7,847,392 Semiconductor device including leadframe with increased I/O 5 2008
7,989,933 Increased I/O leadframe and semiconductor device including same 1 2008
8,008,758 Semiconductor device with increased I/O leadframe 3 2008
8,089,145 Semiconductor device including increased capacity leadframe 1 2008
8,072,050 Semiconductor device with increased I/O leadframe including passive device 0 2008
7,875,963 Semiconductor device including leadframe having power bars and increased I/O 3 2008
7,982,298 Package in package semiconductor device 1 2008
8,058,715 Package in package device for RF transceiver module 1 2009
7,732,899 Etch singulated semiconductor package 0 2009
8,026,589 Reduced profile stackable semiconductor package 5 2009
7,960,818 Conformal shield on punch QFN semiconductor package 0 2009
7,928,542 Lead frame for semiconductor package 1 2009
7,977,163 Embedded electronic component package fabrication method 2 2009
8,089,141 Semiconductor package having leadframe with exposed anchor pads 0 2010
8,188,584 Direct-write wafer level chip scale package 0 2010
7,932,595 Electronic component package comprising fan-out traces 4 2010
8,324,511 Through via nub reveal method and structure 0 2010
7,906,855 Stacked semiconductor package and method of making same 1 2010
8,294,276 Semiconductor device and fabricating method thereof 0 2010
8,084,868 Semiconductor package with fast power-up cycle and method of making same 0 2010
8,319,338 Thin stacked interposer package 0 2010
8,440,554 Through via connected backside embedded circuit features structure and method 0 2010
8,299,602 Semiconductor device including leadframe with increased I/O 0 2010
8,188,579 Semiconductor device including leadframe having power bars and increased I/O 1 2010
8,390,130 Through via recessed reveal structure and method 0 2011
8,318,287 Integrated circuit package and method of making the same 0 2011
8,102,037 Leadframe for semiconductor package 0 2011
8,119,455 Wafer level package fabrication method 1 2011
8,441,110 Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package 0 2011
8,304,866 Fusion quad flat semiconductor package 0 2011
8,432,023 Increased I/O leadframe and semiconductor device including same 0 2011
8,227,921 Semiconductor package with increased I/O density and method of making same 0 2011
8,298,866 Wafer level package and fabrication method 0 2012
 
MICRON TECHNOLOGY, INC. (9)
6,005,286 Increasing the gap between a lead frame and a semiconductor die 10 1997
6,630,730 Semiconductor device assemblies including interposers with dams protruding therefrom 35 2001
6,576,993 Packages formed by attaching a semiconductor chip to a leadframe with a footprint of about the same size as the chip 8 2001
6,537,856 Method of attaching a semiconductor chip to a leadframe with a footprint of about the same size as the chip and packages formed thereby 8 2001
6,624,006 Methods of attaching a semiconductor chip to a leadframe with a footprint of about the same size as the chip 8 2002
6,693,349 Semiconductor chip package having a leadframe with a footprint of about the same size as the chip 4 2002
7,064,002 Method for fabricating interposers including upwardly protruding dams, semiconductor device assemblies including the interposers 0 2002
7,115,981 Semiconductor device assemblies including interposers with dams protruding therefrom 3 2003
7,041,532 Methods for fabricating interposers including upwardly protruding dams 3 2004
 
INVENSAS CORPORATION (1)
6,693,361 Packaging of integrated circuits and vertical integration 67 2000
 
NEC ELECTRONICS CORPORATION (1)
5,988,707 Semiconductor device of lead-on-chip structure 5 1997
 
OKI SEMICONDUCTOR CO., LTD. (1)
5,998,877 Semiconductor device packaged in plastic and mold employable for production thereof 15 1997
 
SAMSUNG ELECTRONICS CO., LTD. (1)
6,794,745 Lead on chip type semiconductor package 2 2000
 
TRU-SI TECHNOLOGIES, INC. (1)
6,322,903 Package of integrated circuits and vertical integration 178 1999
 
Other [Check patent profile for assignment information] (1)
6,181,569 Low cost chip size package and method of fabricating the same 144 1999