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Abstract

A multilayer ceramic capacitor comprising an interlayer, which mitigates stress of a dielectric material cause by a counter piezoelectric phenomenon, provided between capacity-forming layers. The capacity-forming layer preferably comprises seven or more internal electrode layers including a first electrode layer and a second electrode layer, the first electrode layer having two or more electrodes, the second electrode layer having one or more electrodes which all face the first electrode layer, the first and second electrode layers forming two or more capacitor units connected in series. The interlayer preferably has a thickness of from 75 to 900 .mu.m. The interlayer preferably contains internal electrodes having a structure incapable of forming a capacity.

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First Claim