Intrachip power distribution package and method for semiconductors having a supply node electrically interconnected with one or more intermediate nodes

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United States of America Patent

PATENT NO 5838072
SERIAL NO

08805391

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Abstract

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An integrated circuit has a supply node for supplying power to at least one intermediate node coupled to circuitry for receiving power. Rather than transmit power from the supply node to the intermediate node by means of a power bus formed as part of the chip interconnect structure, power is supplied to an external wire which is coupled from the supply to the intermediate node. Other than as connected to the supply node and intermediate node, the wire is electrically isolated from the die. This structure and method for making the semiconductor package allow power to be distributed within a semiconductor chip without sacrificing valuable chip space and without requiring a special lead frame for distributing the power within the semiconductor chip.

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Patent Owner(s)

Patent OwnerAddress
CHIP PACKAGING SOLUTIONS LLC6136 FRISCO SQUARE BLVD SUITE 385 FRISCO TX 75034

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Li, Li-Chun Los Gatos, CA 37 486
Liu, Lawrence C Menlo Park, CA 10 100
Murray, Michael A Bellevue, WA 102 50483

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