Transparent PCI to PCI bridge with dynamic memory and I/O map programming
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United States of America Patent
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Nov 17, 1998
Issued Date -
N/A
app pub date -
Jun 30, 1997
filing date -
Dec 23, 1996
priority date (Note) -
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Abstract
A PCI repeater coupled between a primary bus and a secondary bus includes logic to allow downstream and upstream bursting across the repeater. The PCI repeater is operable to echo transactions in either an upstream or downstream direction. During configuration, the PCI repeater snoops configuration cycles on the primary bus to build an address map of devices on the primary bus. The PCI repeater then uses the address map as a lookup table as a positive determination of whether to forward a transaction upstream.
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