Apparatus and method for a programmable interval timing generator in a semiconductor memory

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United States of America Patent

PATENT NO 5841707
SERIAL NO

08758138

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Programmable time delay apparatus includes a plurality of similar components (10) which determine the total time delay of the apparatus. These components have gate units (31.sub.0 -31.sub.n,32.sub.0 -=.sub.n, 33.sub.0 -33.sub.n, 34.sub.0 -34.sub.n) coupled thereto which, in response to a control signal (b.sub.0 -b.sub.n) applied to each component, either electrically couples the component to the apparatus or electrically removes of the component from the apparatus. In a fist embodiment, the control signals (b.sub.0 -b.sub.n) place time delay components (10) in a series configuration, the total time delay being the sum of the time delays of each series-coupled component (10). In the second and third embodiment, the resistors (47.sub.0 -47.sub.n) and the capacitors (53.sub.0 -53.sub.n), respectively, are coupled in a capacitance charging circuit (47.sub.0 -47.sub.n, 43; 52, 53.sub.0 -53.sub.n), the coupled elements controlling the charging rate and, consequently, the time delay of the apparatus. By coupling the apparatus in a ring configuration (FIG. 6), a counter unit (63), counting the number of signal delays through the delay apparatus (61) can lengthen the programmed time delay.

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Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCORPORATED12500 TI BOULEVARD M/S 3999 DALLAS TX 75243

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cline, Danny R Plano, TX 18 295
Hii, Francis Singapore, SG 6 148

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