Apparatus and method for a programmable interval timing generator in a semiconductor memory

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5841707
SERIAL NO

08758138

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Programmable time delay apparatus includes a plurality of similar components (10) which determine the total time delay of the apparatus. These components have gate units (31.sub.0 -31.sub.n,32.sub.0 -=.sub.n, 33.sub.0 -33.sub.n, 34.sub.0 -34.sub.n) coupled thereto which, in response to a control signal (b.sub.0 -b.sub.n) applied to each component, either electrically couples the component to the apparatus or electrically removes of the component from the apparatus. In a fist embodiment, the control signals (b.sub.0 -b.sub.n) place time delay components (10) in a series configuration, the total time delay being the sum of the time delays of each series-coupled component (10). In the second and third embodiment, the resistors (47.sub.0 -47.sub.n) and the capacitors (53.sub.0 -53.sub.n), respectively, are coupled in a capacitance charging circuit (47.sub.0 -47.sub.n, 43; 52, 53.sub.0 -53.sub.n), the coupled elements controlling the charging rate and, consequently, the time delay of the apparatus. By coupling the apparatus in a ring configuration (FIG. 6), a counter unit (63), counting the number of signal delays through the delay apparatus (61) can lengthen the programmed time delay.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddressTotal Patents
TEXAS INSTRUMENTS INCORPORATEDDALLAS, TX17541

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cline, Danny R Plano, TX 18 292
Hii, Francis Singapore, SG 6 147

Cited Art Landscape

Patent Info (Count) # Cites Year
 
ADVANCED MICRO DEVICES, INC. (1)
* 5459422 Edge selective delay circuit 21 1993
 
RENESAS ELECTRONICS CORPORATION (1)
* 5642319 High-speed read-out semiconductor memory 4 1996
 
MAGNACHIP SEMICONDUCTOR, LTD. (1)
* 5596538 Semiconductor memory device 22 1995
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
ETRON TECHNOLOGY, INC. (1)
* 5923613 Latched type clock synchronizer with additional 180.degree.-phase shift clock 48 1998
 
FRANCE BREVETS (2)
* 7425857 Time-delay circuit 6 2005
* 2005/0195,010 Time-delay circuit 0 2005
 
MICRON TECHNOLOGY, INC. (3)
* 6111812 Method and apparatus for adjusting control signal timing in a memory device 103 1999
6304511 Method and apparatus for adjusting control signal timing in a memory device 80 2000
7137024 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding 0 2003
 
GLOBALFOUNDRIES INC. (1)
* 7221601 Timer lockout circuit for synchronous applications 1 2006
 
SAMSUNG ELECTRONICS CO., LTD. (2)
* 5969999 Merged memory logic integrated circuits including buffers driven by adjustably delayed clock signals 5 1997
* 6621315 Delay locked loop circuit and method having adjustable locking resolution 45 2002
 
RAMBUS INC. (5)
* 6038195 Synchronous memory device having a delay time register and method of operating same 111 1998
* 5953263 Synchronous memory device having a programmable register and method of controlling same 127 1998
* 6035365 Dual clocked synchronous memory device having a delay time register and method of operating same 103 1998
6415339 Memory device having a plurality of programmable internal registers and a delay time register 19 1998
* 6067592 System having a synchronous memory device 63 1999
 
NXP USA, INC. (1)
* 6052746 Integrated circuit having programmable pull device configured to enable/disable first function in favor of second function according to predetermined scheme before/after reset 6 1998
 
SLORAM, INC. (1)
* 5917760 De-skewing data signals in a memory system 204 1997
 
ROUND ROCK RESEARCH, LLC (38)
6912680 Memory system with dynamic timing correction 52 1997
6269451 Method and apparatus for adjusting data timing by delaying clock signal 45 1998
6338127 Method and apparatus for resynchronizing a plurality of clock signals used to latch respective digital signals, and memory device using same 63 1998
6349399 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 18 1998
6279090 Method and apparatus for resynchronizing a plurality of clock signals used in latching respective digital signals applied to a packetized memory device 39 1998
6430696 Method and apparatus for high speed data capture utilizing bit-to-bit timing correction, and memory device using same 176 1998
6374360 Method and apparatus for bit-to-bit timing correction of a high speed memory bus 39 1998
6340904 Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal 26 1999
6378079 Computer system having memory device with adjustable data clocking 82 2000
6327196 Synchronous memory device having an adjustable data clocking circuit 59 2000
6959016 Method and apparatus for adjusting the timing of signals over fine and coarse ranges 18 2000
6954097 Method and apparatus for generating a sequence of clock signals 9 2001
6801989 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same 92 2001
6499111 Apparatus for adjusting delay of a clock signal relative to a data signal 46 2001
6477675 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 1 2001
6952462 Method and apparatus for generating a phase dependent control signal 27 2001
6662304 Method and apparatus for bit-to-bit timing correction of a high speed memory bus 140 2002
6643789 Computer system having memory device with adjustable data clocking using pass gates 17 2002
6931086 Method and apparatus for generating a phase dependent control signal 15 2002
7016451 Method and apparatus for generating a phase dependent control signal 4 2002
6647523 Method for generating expect data from a captured bit pattern, and memory device using same 14 2002
7168027 Dynamic synchronization of data capture on an optical or other high speed communications link 19 2003
7085975 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 6 2003
7159092 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same 15 2003
7234070 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding 17 2003
7415404 Method and apparatus for generating a sequence of clock signals 4 2005
7418071 Method and apparatus for generating a phase dependent control signal 9 2005
7373575 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 1 2006
7461286 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding 7 2006
8181092 Dynamic synchronization of data capture on an optical or other high speed communications link 2 2006
7889593 Method and apparatus for generating a sequence of clock signals 2 2007
7657813 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 1 2008
7602876 Method and apparatus for generating a phase dependent control signal 8 2008
8107580 Method and apparatus for generating a phase dependent control signal 1 2009
7954031 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 2 2009
8565008 Method and apparatus for generating a sequence of clock signals 0 2011
8433023 Method and apparatus for generating a phase dependent control signal 0 2012
8892974 Dynamic synchronization of data capture on an optical or other high speed communications link 0 2012
 
STMICROELECTRONICS S.R.L. (2)
7283005 Clock-pulse generator circuit 0 2005
* 2005/0231,293 Clock-pulse generator circuit 1 2005
 
RENESAS ELECTRONICS CORPORATION (8)
* 6791385 Clock controlling method and circuit 1 2001
* 6621317 Clock controlling method and circuit 20 2002
* 6888387 Clock controlling method and circuit 3 2003
* 6791386 Clock controlling method and circuit with a multi-phase multiplication clock generating circuit 1 2003
7034592 Clock controlling method and circuit 3 2004
* 6965259 Clock controlling method and circuit 2 2004
6900680 Clock controlling method and circuit 0 2004
* 6847243 Clock controlling method and circuit 0 2004
 
SII SEMICONDUCTOR CORPORATION (2)
* 7915964 Variable frequency oscillating circuit 0 2008
* 2009/0058,542 Variable frequency oscillating circuit 2 2008
 
OKI SEMICONDUCTOR CO., LTD. (1)
* 5936269 Semiconductor memory device including a redundant circuit 3 1998
 
ADVANCED MEMORY INTERNATIONAL, INC. (1)
6546476 Read/write timing for maximum utilization of bi-directional read/write bus 9 2000
 
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC. (7)
6400641 Delay-locked loop with binary-coupled capacitor 3 1999
6262921 Delay-locked loop with binary-coupled capacitor 53 2000
6256259 Delay-locked loop with binary-coupled capacitor 0 2000
* 6356489 Integrated circuit memory devices having circuits therein that preserve minimum /RAS TO /CAS Delays 3 2001
6483757 Delay-locked loop with binary-coupled capacitor 3 2001
6490224 Delay-locked loop with binary-coupled capacitor 9 2001
6490207 Delay-locked loop with binary-coupled capacitor 25 2001
* Cited By Examiner