Method and apparatus for adjusting pin driver charging and discharging current
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United States of America Patent
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Nov 24, 1998
Grant Date -
N/A
app pub date -
May 3, 1993
filing date -
May 3, 1993
priority date (Note) -
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Abstract
A method and apparatus for adjusting charging and discharging currents of a pin driver to optimize slew rates and overshoot for different types of logic circuits. The current charging and discharging circuits include respective transistors that are mirrored to a transistor whose current varies in accordance with VH-VL where VH and VL are programmed reference voltages defining the high and low voltage levels of the output driver pulses. Thus, when VH-VL is relatively large such as for CMOS outputs, slew rates are relatively high. However, when VH-VL is relatively small such as for ECL outputs, slew rates are reduced to prevent excessive overshoot.
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