Differential flipflop circuit operating with a low voltage
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Dec 1, 1998
Grant Date -
N/A
app pub date -
Mar 28, 1997
filing date -
Mar 28, 1996
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a flipflop circuit, each of master and slave latch/hold circuits is constituted of differential pairs consisting of transistors each connected between VCC and VSS without being in series with another transistor between VCC and VSS. A clock driving circuit has a pull-down function responding to a pair of complementary clocks so as to pull down the level of a pair of complementary data signals supplied to each latch/hold circuit. With this arrangement, the flipflop circuit composed of bipolar transistors can operate with a low voltage of not greater than 1 V.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully