Programmable logic device with two dimensional memory addressing
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United States of America Patent
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Dec 1, 1998
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N/A
app pub date -
Dec 2, 1996
filing date -
Sep 18, 1996
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Abstract
A programmable logic array integrated circuit device having a memory array in which data can be accessed in either a transposed or nontransposed mode. The memory array has multiple rows and columns of memory cells. Each row of cells can be viewed as a matrix made up of virtual rows and virtual columns. Data in a given row of the memory array can be accessed using nontransposed data words that contain data bits corresponding to cells in the virtual rows. Data in the given row can also be accessed using transposed data words that contain data bits corresponding to cells in the virtual columns.
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