Test handler for DUT's

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United States of America Patent

PATENT NO 5847293
SERIAL NO

08566940

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Abstract

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A handling system for devices under test (DUTs), i.e. semiconductor chips. A rotatable platform is provided which platform has a plurality of boats or nests. The DUTs are inserted in the boats. The platform carrying the DUTs is indexed through a plurality of treatment stations to precondition the chips specifically to bring the chip to a test temperature. At a test station, the chip is removed from the boat and inserted into a manufacturer's test head. The chip is tested, returned to the boat and indexed to a treatment station(s) downstream of the test head where is ultimately removed for further processing.

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Patent Owner(s)

Patent OwnerAddress
EJ SYSTEMS INC360 MERRIMACK STREET LAWRENCE MA 01843

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jones, Elmer R North Reading, MA 8 381

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