Programmable logic array with improved interconnect structure

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United States of America Patent

PATENT NO 5847579
SERIAL NO

08821124

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Abstract

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A programmable logic array improves connectivity and more efficiently routes signals between logic blocks by allowing programmable connections between each logic block and the horizontal interconnect lines above and below the logic block. Thus, more efficient signal transfer is achieved, particularly when connectivity is required between logic blocks in adjacent rows. The logic array decreases transmission delay and frees up bandwidth on vertical interconnect lines, thereby optimizing the use of routing resources.

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Patent Owner(s)

Patent OwnerAddress
XILINX INC2100 LOGIC DRIVE SAN JOSE CA 95124

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Trimberger, Stephen M San Jose, CA 250 12066

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