Process for packaging a semiconductor die using dicing and testing
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United States of America Patent
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Dec 22, 1998
Grant Date -
N/A
app pub date -
Dec 18, 1995
filing date -
Dec 18, 1995
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A method for packaging semiconductor dice is provided. The package includes a thinned die mounted on a compliant adhesive layer to a substrate. The package is formed by providing a wafer containing a plurality of dice, thinning a backside of the wafer by etching or polishing, attaching the thinned wafer to the substrate, and then dicing the wafer. The semiconductor package can be mounted to a supporting substrate such as a printed circuit board in a chip-on-board configuration. The compliant adhesive layer and substrate of the package eliminate stresses and cracking of the die caused by a thermal mismatch between the die and supporting substrate. In addition, the semiconductor package can be mounted in a flip chip configuration with the substrate for the package protecting a backside of the die from radiation.
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