Method of fabricating semiconductor device and semiconductor device

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United States of America Patent

PATENT NO 5854509
SERIAL NO

08641819

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Abstract

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Ordinary anisotropic etching is performed up to a depth (d1) while anisotropic etching is performed to form an inward taper from the depth (d1) by changing etching conditions such as components in a vapor phase and the temperature of a silicon substrate (1), thereby forming a groove (20). Thereafter silicon is epitaxially grown in the groove (20), thereby forming an epitaxial silicon layer (4). An NMOS transistor is formed on an upper layer part of the epitaxial silicon layer (4). At this time, the taper of the groove (20) is located under a part of an n.sup.+ layer (8) forming the NMOS transistor. Thus, a method of fabricating a semiconductor device capable of performing element isolation with neither halation nor formation of bird's beak in fabrication while minimizing a leakage current flowing across elements is obtained.

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Patent Owner(s)

  • MITSUBISHI DENKI KABUSHIKI KAISHA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kunikiyo, Tatsuya Tokyo, JP 73 1902

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