Controlled impedence interposer substrate

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5854534
SERIAL NO

08559369

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An interposer substrate for mounting an integrated circuit chip to a substrate, and method of making the same, are shown. The interposer substrate comprises power supply paths and controlled impedance signal paths that are substantially isolated from each other. Power supply is routed though rigid segments and signals are routed though a thin film flexible connector that runs from the upper surface of the interposer substrate to the lower surface. Bypass capacitance is incorporated into the interposer substrate and connected to the power supply so that it is positioned very close to the integrated circuit chip. The interposer may be fabricated by forming a multilayered thin film structure including the signal paths over a rigid substrate having vias formed therein, removing the central portion of the substrate leaving the two end segments, and folding and joining the end segments such that the vias are connected. In another embodiment of the invention, a separate power plate is provided for carrying the power lines. Portions of the power plate, with a multilayered thin film structure thereon, are cut and folded to form interposers. Methods of making single-chip interposers are also disclosed.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
FUJITSU LIMITED1-1 KAMIKODANAKA 4-CHOME NAKAHARA- KU KAWASAKI-SHI KANAGAWA 211-8588 211-8588

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Beilin, Solomon I San Carlos, CA 53 3669
Chou, William T Cupertino, CA 29 1273
Kudzuma, David San Jose, CA 9 606
Lee, Michael G San Jose, CA 77 2816
Moresco, Larry L San Carlos, CA 23 1137
Murase, Teruo San Jose, CA 11 545
Peters, Michael G Santa Clara, CA 29 1576
Roman, James J Los Altos, CA 20 1306
Swamy, Som S Danville, CA 7 472
Wang, Wen-chou Vincent Cupertino, CA 45 2599

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation