Integrated circuit with non-binary decoding and data access
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United States of America Patent
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Dec 29, 1998
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N/A
app pub date -
Jan 31, 1997
filing date -
Jan 31, 1997
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Abstract
This invention describes an addressing and data access method and apparatus which can make use of maximum sized, binary configured blocks of memory or macro cells. The binary sized blocks of memory may be used to implement a non-binary sized overall memory circuit. The apparatus as described makes efficient use of silicon area by combining an optimized number of memory blocks or macro cells having at least two data port per macro cell to implement a non-binary sized memory circuit.
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