Importance

Loading Importance Indicators...

Abstract

A method of forming vias in an interlevel dielectric structure of an integrated circuit, such that the aspect ratio of the vias is smaller than the aspect ratios of vias having a height equal to the thickness of the entire interlevel dielectric structure, and the integrated circuit formed according to such a method. Conductive elements are formed over an insulator. A first dielectric structure is formed over the conductive elements and over the insulator. The first dielectric structure contains a first dielectric, formed over the conductive elements and the insulator, and a planarizing dielectric, formed over the first dielectric to bulk fill the areas between the conductors. A thin layer of a second dielectric can be formed over the first dielectric and the planarization dielectric. Vias are patterned and etched in the first dielectric structure. The thickness of the first dielectric structure is such that the aspect ratios of the vias through it is close to, or less than, 1. A thin barrier is formed in the vias, and the vias are filled with contact plugs. A second dielectric structure is then formed over the first dielectric structure and the contact plugs. Vias are patterned and etched in this second dielectric structure. The thickness of the second dielectric structure is also such that the aspect ratios of the vias through it is close to, or less than, 1. A thin barrier is formed in the vias, and the vias are filled with contact plugs. Additional dielectric structures containing vias and contact plugs may be formed over the second dielectric structure.

Loading the Abstract Image...

First Claim