Importance

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Abstract

A real time video processing system adds a programmable logic device between a conventional frame buffer and a conventional digital to analog converter to provide real time and off-screen processing power to enhance video output capabilities. The system may include a history FIFO connected to deliver the preceding line to the programmable logic device, allowing operations on a pixel in the current line, modified as needed by the status of one or more nearby pixels. The system may also include inputs for multiple video sources and may include input FIFOs for more random access to portions of the input stream. An alternative form of the system includes a crossbar switch and multiple memory devices, to allow switching among several possible frame buffer devices. One or more processing units can be added to manipulate a memory which is not the active frame buffer. The programmable logic device can be loaded with a configuration file stored in an associated memory or loaded from a host computer.

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First Claim