Photo masks for developing planar layers in a semiconductor device, and methods of forming the same

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United States of America Patent

PATENT NO 5858578
SERIAL NO

08665622

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Abstract

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The semiconductor masking device of the invention includes a first semiconductor mask for forming an interconnection on a semiconductor substrate and a second semiconductor mask for forming a resist pattern on an insulating film. The first semiconductor mask has three masking areas and the second semiconductor mask has two masking areas. Masking area intervals, that is, the distances between the three masking areas of the first semiconductor mask and the two masking areas of the second semiconductor mask, are all equal to one another.

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Patent Owner(s)

Patent OwnerAddress
MATSUSHITA ELECTRIC INDUSTRIAL CO LTDOSAKA JAPAN OSAKA

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kato, Yoshiaki Hyogo, JP 361 5107
Miyajima, Akio Osaka, JP 13 111
Ukeda, Takaaki Osaka, JP 40 338
Yamada, Tatsuya Osaka, JP 85 608

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