Method and apparatus for providing high numerical accuracy with packed multiply-add or multiply-subtract operations
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United States of America Patent
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Jan 19, 1999
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N/A
app pub date -
Dec 29, 1995
filing date -
Dec 29, 1995
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Abstract
A method and apparatus for combining at least two packed multiply-accumulate instructions (or equivalent operations) to compute a filter result from coefficients having more bits than can be processed by a single multiply-accumulate instruction (or equivalent operation). This achieves greater accuracy in computing transforms and digital filters without requiring more expensive hardware to implement multiply-accumulate instructions for larger operands. Typical applications are compression/decompression algorithms, modem, audio and video. The invention is scalable, permitting additional multiply-accumulate instructions to be added as incrementally larger coefficients are required. Additionally, the invention permits different numbers of multiply-accumulate instructions for each coefficient depending on the sensitivity to that particular coefficient.
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